CMOS Image Sensor with Dual-Sensitivity Photodiodes and Switching Circuitfor Wide Dynamic Range Operation

http://dx.doi.org/10.5369/JSST.2017.26.4.223 pISSN 1225-5475/eISSN 2093-7563

CMOS Image Sensor with Dual-Sensitivity Photodiodes and Switching Circuit for Wide Dynamic Range Operation

Jimin Lee

, Byoung-Soo Choi

, Myunghan Bae

, Sang-Hwan Kim

, Chang-Woo Oh

, and Jang-Kyoo Shin

Abstract

Conventional CMOS image sensors (CISs) have a trade-off relationship between dynamic range and sensitivity. In addition, their sen- sitivity is determined by the photodiode capacitance. In this paper, CISs that consist of dual-sensitivity photodiodes in a unit pixel are proposed for achieving wide dynamic ranges. In the proposed CIS, signal charges are generated in the dual photodiodes during inte- gration, and these generated signal charges are accumulated in the floating-diffusion node. The signal charges generated in the high-sen- sitivity photodiodes are transferred to the input of the comparator through an additional source follower, and the signal voltages converted by the source follower are compared with a reference voltage in the comparator. The output voltage of the comparator deter- mines which photodiode is selected. Therefore, the proposed CIS composed of dual-sensitivity photodiodes extends the dynamic range according to the intensity of light. A 94 × 150 pixel array image sensor was designed using a conventional 0.18 µm CMOS process and its performance was simulated.

Keywords: CMOS image sensor, Dual-sensitivity photodiodes, Switching circuit, Wide dynamic range

1. INTRODUCTION

CMOS image sensors (CISs) are widely used in security systems, digital single lens reflex (DSLR) cameras, medical devices, and mobile devices [1-8]. The main performance requirements of the CIS are high sensitivity, high resolution, low noise, and wide dynamic range (WDR). Among these performance parameters, WDR is a very important parameter for CISs [9-13]. There are several techniques for obtaining WDR, such as multiple sampling, linear-logarithmic response, or by using a lateral overflow integration capacitor (LOFIC) [14]. The use of dual-sensitivity photodiodes in charge-coupled device (CCD) image sensors had previously been proposed for achieving WDR [15]. However, this method suffers from slow processing speed because of the complex digital signal processing (DSP) circuit.

In this paper, we propose a WDR CIS that uses dual-sensitivity photodiodes with a comparator and switching circuit without DSP.

The proposed CIS has a higher processing speed than the CCD image sensors because the image signal processing circuit is simple.

2. DESIGN

2.1 Operation principle

Fig. 1 shows the concept of the proposed CMOS image sensor. Noticeable differences can be observed between the images of the conventional CIS and the proposed CIS.

Compared to the conventional CIS, the proposed CIS exhibits a clearer image at a higher light intensity by using additional circuits. Fig. 2 shows the schematic of the proposed CIS. In the proposed CIS, two photodiodes with different sensitivities are

1

School of Electronics Engineering, Kyungpook National University, 80 Deahakro, Buk-gu, Daegu 702-701, Korea

2

Department of Sensor and Display Engineering, Kyungpook National University, 80 Deahakro, Buk-gu, Daegu 702-701, Korea

+

Corresponding author: [email protected]

(Received: Jul. 18, 2017, Revised: Jul. 26, 2017, Accepted: Jul. 26, 2017)

This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License(http://creativecommons.org/

licenses/bync/3.0) which permits unrestricted non-commercial use, distribution,

and reproduction in any medium, provided the original work is properly cited. Fig. 1. Concept of the proposed image sensor.

integrated in a unit pixel. As shown in Fig. 2, output signal from the high-sensitivity photodiode (V _High) is transferred to the input of the comparator through an additional source follower, and is compared to the reference voltage (V _Ref ) in the comparator. A switching circuit is operated depending on the output signal from the comparator (V _Comp) . In other words, when V _High is below V _Ref , the final output signal changes to output signal from the low-sensitivity photodiode (V _Low) . Therefore, the dynamic range is expanded.

2.2 Comparator and switching circuit

Fig. 3 shows the operation of the switching circuit and the comparator. The circuits are used for selecting the sensitivity automatically between V _High and V _Low . The comparator receives V _High from the additional source follower connected at its input, and then it compares V _High with V _Ref . V _Comp becomes 0 or 1 depending on the signal received from the high-sensitivity photodiode. Based on V _Comp , the switching circuit selects the switch that is open between V _High and V _Low . The proposed CIS does not require complicated signal processing circuits and it demonstrates higher speeds compared to the CCD image sensors.

2.3 Dual-sensitivity photodiodes

The potentials of the dual-sensitivity photodiodes in the unit pixel for different sensitivities are shown in Fig. 4 (a) and (b). The proposed pixel structure is fabricated using a conventional CMOS process. Typically, photodiodes that have different sizes of N+

doping areas have the same sensitivity, as shown in Fig. 4 (a). This is because, microlenses are not generally integrated in a conventional CMOS process. The entire area of the photodiode is illuminated by the light source without light collection. Therefore, the amount of light that enters the two photodiodes is related to the area of each photodiode. The difference in sensitivity is implemented by a metal shielding technique, as shown in Fig. 4 (b). The light intensity for low-sensitivity photodiode is reduced.

In this case, the sensitivity is reduced in the low-sensitivity photodiode. Using this technique, the proposed pixel structure achieves WDR by using dual-sensitivity photodiodes and low fabrication cost without microlens fabrication.

Fig. 2. Schematic diagram of the proposed CIS.

Fig. 3. Operation of the switching circuit and comparator. Fig. 4. Potential of dual photodiodes in a unit pixel. (a) without metal

shielding layer, (b) with metal shielding layer.

2.4 Chip design

The block diagram of the proposed CIS is shown in Fig. 5.

The proposed CIS is composed of a 94 × 150 pixel array, comparators, switching circuits, calibration circuits, a bias circuit, and a column parallel readout. The size of the chip is 1.9 mm × 3.8 mm and the size of a unit pixel is 13 μm × 13 μm. The fill factors of a unit pixel with high- and low- sensitivity photodiodes are shown in Fig. 6.

3. SIMULATION RESULTS AND DISCUSSIONS

In the proposed CIS, the sensitivity is selected according to the illumination conditions, using the dual-sensitivity photodiodes. In order to extend the dynamic range, it is important to select the

output voltage of the low-sensitivity photodiode under high illumination condition. The calibration circuit is integrated to adjust the output voltage of the low-sensitivity photodiode. The output characteristics of the proposed CIS using the dual- sensitivity photodiodes and the switching circuit were simulated for different illumination conditions.

Fig. 7 shows the original and calibrated output voltages of the proposed CIS. As shown in Fig. 7, the V _Low of the calibrated output is adjusted by the calibration circuit, while the low- sensitivity switch operates because the original output signal levels of V _High and V _Low are not distinguished before calibration.

Fig. 8 shows the simulation results of the output voltage according to the reference voltage of the comparator when the photocurrent increases. As shown in Fig. 8, the dynamic range of the proposed CIS can be extended using the dual-sensitivity Fig. 5. Block diagram of the proposed CIS.

Fig. 6. Fill factors of a unit pixel with high- and low- sensitivity pho- todiodes.

Fig. 7. Original and calibrated output voltages of the proposed active pixel sensor (APS).

Fig. 8. Simulation results for the output voltage according to the ref-

erence voltage of the comparator when the photocurrent

increases.

photodiodes. Moreover, it is possible to control the dynamic range by adjusting the reference voltage. The proposed CIS has not only a wide dynamic range, when compared to the conventional CIS, but it also has the advantage that the dynamic range can be controlled by the reference voltage.

The characteristics of the proposed CIS are summarized in Table 1.

4. CONCLUSIONS

We proposed a CIS with dual-sensitivity photodiodes, comparators, and switching circuits for achieving wide dynamic range operation using standard CMOS process. The main technique implemented for obtaining dual-sensitivity photodiodes was metal shielding. Photodiodes with different sensitivities could be formed by placing metal on certain portions of the photodiode.

A metal-shielded photodiode had less sensitivity than a conventional photodiode. Therefore, the sensitivity of the image sensor could be adjusted by controlling the metal deposited on the photodiode. Simulation results showed that the saturation time could be delayed by adjusting the reference voltage of the comparator, when light of the same intensity entered the photodiode. As a result, it was confirmed that the dynamic range of the image sensor was increased. The proposed CIS was designed using a conventional 0.18 µm CMOS process. The performance of the proposed wide dynamic range CIS was verified by the simulation results.

ACKNOWLEDGMENT

This work was supported by the Brain Korea 21 (BK21) Plus

project funded by the Ministry of Education, Korea (21A20131600011), and the Integrated Circuit Design Education Center (IDEC) in Korea.

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Characteristics Explanation

Process Conventional CMOS

0.18 µm process

Image resolution 94 × 150

Power supply Analog : 3.3 V

Digital : 1.8 V

Pixel size 13 µm × 13 µm

Fill factor

High sensitivity : 26.74%

Low sensitivity : 3.13%

(with metal shielding)

Chip size 1.9 mm × 3.8 mm

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