Chapter 4 Differential Amplifiers

Chapter 4 p

Differential Amplifiers

CMOS Differential Amplifiers

Basic Concepts-L15

Basic Concepts L15

Single ended vs Differential Signals Single-ended vs. Differential Signals

Si l d d i l M d ith

• Single-ended signal: Measured with respect to a fixed potential, typically ground

ground.

• Differential signal: Measured between two symmetric nodes (nodes have equal and y ( q opposite signal excursions around a fixed potential, called a “common-mode” level)

Why Differential?

Why Differential?

• In a single amplifier V

fluctuations appear directly on the amplified signal appear directly on the amplified signal.

• In a differential pair, if we measure V

-

V h fl i l

V

the fluctuations cancel out.

Why Differential?

Why Differential?

• In a single CS amplifier, the maximum swing is V

-(V

-V

)

swing is V

(V

V

)

• In a differential pair it can be shown

h h i f V V h

that the swing of V

-V

can reach

2[V

-(V (

-V

)]. )

Clock Noise Reduction

Clock Noise Reduction

Other advantages of differential amplifying

• Simpler biasing

• Higher linearity Higher linearity

Simple Symmetric Differential Pair won’t do!

Simple Symmetric Differential Pair won t do!

Good features:

R j ti f Rejection of VDD

fluctuations fluctuations, Larger swing.

Key problem: Input signal common-

signal common mode affects bias conditions, and differential

amplification.

Solution: Source-coupled (“long-tailed”) Pair, biasing with a current source

If V_in1=V_in2 then I_D1=I_D2=I_SS/2 Then V =V =V R I /2 Then V_out1=V_out2=V_DD-R_DI_SS/2

“Current stealing “ phenomenon Current stealing phenomenon

If V_{i 1}>>V_{i 2} then M₂ If V_in1>>V_in2, then M₂ turns off and M₁

steals all the current steals all the current.

If V_in1<<V_in2 then M₂ k ll h

takes all the current.

Common Mode Response Common-Mode Response

Can V_in,CM be arbitrarily large or small?

V

must be large enough for M

to be in saturation

M₁,M₂ operate like Source Followers: V_P

increases as V_in,CM increases – must be larger than V_b-V_TH3

V

must not be too large to keep M

and M

from entering Triode Mode

] 2 ,

min[

)

( _{3 3 , 1}

1 TH DD

SS D DD

CM in TH

GS

GS I V V

R V

V V

V

V + − ≤ ≤ − +

Consequences of V

going “off range”

• As long as common mode voltage is within theAs long as common mode voltage is within the permitted range, differential gain is almost

insensitive to it insensitive to it.

• Once too small or too large – gain falls off.

Common-Mode Input vs. Output Swing Tradeoff

E h d i lt

Each drain voltage can go as high as V_DD and as low

V V

as V_in,CM-V_TH.

The larger V_in,CM the smaller

th i

the swing.

Two types of Differential Gains Two types of Differential Gains

“Single-g

ended”: V_out1 (or V_out2)

V V

( _out2)

with respect to ground^.

? )

(

2 1

2

1 =

−

= −

in in

out out

v V V

V diff V

A g

? .)

. (

2 1

1 =

= −

in in

out

v V V

E V S A

2

1 in

in

Current Division Mechanism Current Division Mechanism

Calculate I_D1 and I_D2 in terms of V_in1 and V assuming the circuit is symmetric M V_in2, assuming the circuit is symmetric, M₁

and M₂ are saturated, and λ=0.

Since the voltage at node P is equal to ^TH

D

GS V

W V = 2I +

Since the voltage at node P is equal to V_P=V_in1-V_GS1=V_in2-V_GS2,

V V V V

n L k 'W

V_in1-V_in2=V_GS1-V_GS2

Current Division Mechanism Current Division Mechanism

Given the inputs and Given the inputs and I_SS: Solve two

equations with two equations with two unknowns for the transistor currents:

transistor currents:

2 1

2 1

2

2 _{D D}

in

in W

I W

V I

V − = −

'

' _n

n

I I

I

L k W

L k W

2

1 D

D

SS I I

I = +

CMOS Differential Amplifiers

Small-Signal Differential Gain-L16

Small Signal Differential Gain L16

Current Difference Properties Current Difference Properties

Even though each e t oug eac current is an even function of its

respective gate-

source voltage, the current difference is current difference is an odd function of the input voltage

)2

4 ( )

1 ( _SS

V I V

V W V

C I

I = μ

p g

difference

2 1

2 1

2

1 ( ) ( )

2 ^{in in}

OX n

in in

OX n

D

D V V

L C W

V L V

C I

I − = − − −

μ μ

Differential Transconductance Gain vs. Input Voltage

4I

) (

/ 2

4 ₂

2

1 in

in ox

n

SS ox

n m

D

V L V

W C

I W

G C

I − −

=

Δ = μ μ

∂

∂

) 4 (

2 ₂

2

1 in

in SS

m

in V V

C W L I

V − −

Δ

μ

∂

ox

nC L

μ

Maximum Differential Transconductance Gain Occurs at ΔV

=0

W I C

G ⎟ ⎞

⎜ ⎛

= μ

max

, n ox SS

m

I

C L

G ⎟

⎜ ⎠

= μ ⎝

Differential Voltage Gain Differential Voltage Gain

in m

D D

D out

out V R I R G V

V ₁ − ₂ = Δ = Δ

Differential Voltage Gain near ΔV = 0 Differential Voltage Gain near ΔV

= 0

|

| _V ^out _{m,max D n ox} I_SS R_D

L C W

R V G

A V = = μ

Δ

= Δ _,

in L

ΔV

Differential Transconductance Gain Falls to Zero at ΔV

= ΔV

2

1

W

V

= I

Δ

L C

W

μ

Current Difference Properties Current Difference Properties

It appears as if t appea s as ΔI_DD also a so becomes zero at

ΔV_in2=(4I_SS/(µ_nC_OXW/L))^1/2 But this is incorrect.

ΔV > ΔV at which a total ΔV_in2> ΔV_in1 at which a total current stealing occurs.

)2

4 ( )

1 ( _SS

V I V

V W V

C I

I _{1 2} = μ ( _{1 2}) ( _{1 2})

2 ^{in in}

OX n

in in

OX n

D

D V V

L C W

V L V

C I

I − = − − −

μ μ

ΔV

= ΔV

is the maximum differential input that the amplifier can “handle”

2

1

W

V

= I

Δ

L C

W

μ

Also note that at ΔV

=0 each transistor carries a current of I

/2 and therefore :

I )

( _1,2

L C W

V I V

ox n

SS TH

GS ^{− =} μ

L

Compare this equilibrium

)

( _{GS TH 1 2} Vⁱⁿ¹ V

V Δ

= overdrive to the maximum −

differential input permitted: (V_GS V_TH )_1,2 2

2I V = ^SS Δ ₁

L C W

V

ox n

in ⁼ μ

Δ

It means that if we try to increase ΔV_in1, for a given I_SS, we need larger overdrive voltage in each

transistor, and this is accomplished by reducing W/L

)

( _1,2

C W V I

V_GS − _TH = ^SS

)

( _{GS TH 1 2} Vⁱⁿ¹ V

V Δ

=

−

C_ox L μn

) 2 (V_GS V_{TH 1,2}

2I V = ^SS Δ ₁

L C W

V

ox n

in ⁼ μ

Δ

Small-Signal Differential Voltage Gain

• For |ΔVFor |ΔV_iin|≈0 (sufficiently small) we have:| 0 (sufficiently small) we have:

|

| ^out W I R R

C R

V G A Δ

|

| _{m,max D n ox SS D m D}

in out

V I R g R

C L R

V G

A = = =

= Δ μ

Where g is that of a NMOS with a current of Where g_m is that of a NMOS with a current of I_SS/2

Differential Gain: What does each input

“see”?

• By superposition let’s short V_in2 to ground and see the effect of V_{i 1}

see the effect of V_in1:

• The effect of V_in1 on V_X is the same as that of a CS amplifier

CS amplifier

(degenerated by the

resistance seen looking into the source of M ) into the source of M₂) on V_D

Differential Gain: Effect of V on V Differential Gain: Effect of V

on V

Neglecting λ₂ and g_mb2 R_S≈1/g_m2

1 1

D

X

R

V

V −

≈

2 1

1

1 1

m m

in

g g

V +

2

1 m

m

g

g

Differential Gain: Effect of V on V Differential Gain: Effect of V

on V

The effect of V_in1 on V_Y is the same as that of a Source

F ll (M ) lifi d i i C G

Follower (M₁) amplifier driving a Common-Gate amplifier (M₂)

1 in

T

V

V =

1

T

in T

R =

1 m

T

g

Differential Gain: Effect of V on V Differential Gain: Effect of V

on V

The effect of V_in1 on V_Y is the same as that of a Source

F ll (M ) lifi d i i C G

Follower (M₁) amplifier driving a Common-Gate amplifier (M₂)

R V

1

1 1

D in

Y

R

V V

+

≈

2 1

1

m m

in

g

g +

V V as function of V if V =0 V

-V

as function of V

if V

=0

2R

1 1

_

_ 1 1

) 2

( 1 in m D in

D V

to due Y

X R V g R V

V

V in = −

+

= −

−

2

1 m

m g

g

Because g_m1=g_m2=g_m

By Symmetry: V

-V

as function of V

if V

=0

2R

2 2

_

_ 1 1

) 2

( 2 in m D in

D V

to due Y

X R V g R V

V

V in =

+

=

−

2

1 m

m g

g

V V as function of V and V V

-V

as function of V

and V

1 2

_

) _

(V_X −V_{Y due to both} = g_mR_DV_in − g_mR_DV_in

yielding the gain g R regardless where yielding the gain g_mR_D regardless where and how the inputs are applied

Single-ended Differential Voltage Gain

g V

2 2

1

, D

m in

in

X SE

V g R

V V

A V = −

= −

2 2

1

, D

m in

in Y SE

V g R

V V

A V =

= −

2

1 in

in

Comparison: Differential voltage gain of a differential amplifier vs voltage gain of a CS differential amplifier vs. voltage gain of a CS

amplifier

• If the same current source I_SS drives the

differential amplifier and the CS, each transistor

√ of the differential amplifier has g_m which is 1/√2 of that of the CS transistor. Differential gain

√ reduces by a factor of 1/√2 .

• If both amplifiers have the same W/L in each transistor and the same load, and we want the gain to be the same, then if we use I_SSSS at CS, we need to use 2I_SS at the differential amplifier.

The “Virtual Ground” Concept The Virtual Ground Concept

• In a symmetric device (as above), if inputs change anti-y ( ), p g symmetrically (one goes up by a certain amount, and the other goes down by the same amount), then V_P does not change

change.

• For small-signal analysis point P becomes “virtual ground”.

g

The “Virtual Ground” Concept The Virtual Ground Concept

• Explanation: Consider the complete “Kirchhoff path”

V ÆD ÆD ÆV

V_in1ÆD₁ÆD₂ÆV_in2.

• By symmetry of the devices, and anti-symmetry of sources, using voltage-division argument, V_P stays sources, using voltage division argument, V_P stays constant.

• See book (pp. 114-115) for 2-3 more explanations.

The “Half Circuit” Concept The Half-Circuit Concept

• For small-signal analysis because point P isFor small signal analysis, because point P is

“ground” (this is valid only if inputs are anti-

symmetric and devices are symmetric!) we can symmetric and devices are symmetric!), we can analyze each CS “half-circuit” separately.

Differential Gain with λ effect Differential Gain with λ effect

• Based on the half-circuit concept gainBased on the half circuit concept, gain calculation is highly simplified. We get:

• V /V = g (R ||r )=V /( V )

• V_X/V_in1=-g_m(R_D||r_o)=V_Y/(-V_in1)

• (V_X-V_Y)/2V_in1=-g_m(R_D||r_o)

In general V

and V

are arbitrary (not

necessarily anti-symmetric): What do we do?

Analysis of Differential Amplifiers for arbitrary inputs

A l i it t l

• As long as circuit operates more or less linearly, we use superposition of two

analyses:

• Differential input analysis, using anti- p y , g symmetric inputs derived from the difference between the inputs.

d e e ce bet ee t e puts

• Common-mode analysis, where an input equals to the average of both inputs is

equals to the average of both inputs is

applied to both transistors.

CMOS Differential Amplifiers

Common-Mode Analysis –L17

Common Mode Analysis L17

Goal: No common-mode signal at amplifier’s output

• If amplifier is not 100% symmetric, CM signals will not be fully cancelled out. g y

• If the DC current source (biasing the

amplifier) is not ideal (that is has a finite

amplifier) is not ideal (that is, has a finite

output resistance) then CM signal appears

at each single-ended output.

Single-ended Common-Mode

Response of a symmetric amplifier

Consider a small- signal analysis for signal analysis for the common-mode signal

signal.

Current source is represented by its output resistance R_SS

Single-ended Common-Mode

Response of a symmetric amplifier

As V_in,CM changes so does V_P As a so does V_P. As a result, I_D currents change and V_X and change, and V_X and V_Y change.

V_X-V_Y continues to be zero.

Single-ended Common-Mode

Response of a symmetric amplifier

To find V_X as

function of V_{i CM} we function of V_in,CM we may do a “half

circuit analysis”

circuit analysis , splitting R_SS into two parallel 2R_SS two parallel 2R_SS resistors, or

equivalently equivalently,

connect transistors in parallel (as

in parallel (as shown).

Single-ended Common-Mode Gain of a symmetric amplifier assuming λ=0 and γ=0

C Y C

X C

out CM

V V

V V

V V

A _, = V = =

D

CM in CM

in CM

in

R

V V

V

−

= / 2

, ,

,

SS

m R

g ) + 2

/(

1

M +M has M₁+M₂ has

twice the width and bias

and bias current,

therefore g is therefore g_m is doubled.

Most Primitive Differential Amplifier:

Resistor in place of current source

• Example: Let VExample: Let V_DDDD=3V (W/L)3V, (W/L)₁₁=(W/L)(W/L)₂₂=25/0 525/0.5

• µ_nC_OX=50µA/V², V_TH=0.6V, λ=0, γ=0, R_SS=500Ω

B I I 0 5 A h

• Because I_D1=I_D2=0.5mA, we have:

V I V

V

V 2 ^D₁ 1 23

+V V

L C W

V

V _TH

OX n GS

GS₁ = ₂ = + =1.23

μ

“Resistor current source” example Resistor current source example

V I V

V

V 2 ^D₁ 1 23

+V V

L C W

V

V _TH

OX n

D GS

GS₁ = ₂ = ¹ + =1.23

μ

• Also: VAlso: V_SS=I RI_ssR_SSSS=0 5V0.5V

• Bias voltage at gates V_in,CM=V_GS1+V_S=1.73V

Thi lt t th 0 5 A

• This voltage creates the necessary 0.5mA current in each of the transistors.

“Resistor current source” example – differential gain design

1 W

= Ω

= 632

2

1

m

I

L C W

g μ

If R_D=3.16KΩ then differential voltage gain = If R_D 3.16KΩ then differential voltage gain g_mR_D=5

“Resistor current source” example – with such R

are transistors in Saturation?

V_out1=V_out2=V_DD-I_DR_D=1.42V > V_in,CM – V_TH

=1.73 – 0.6 = 1.13V by 290mV (the overdrive)

“Resistor current source” example – Common-Mode Response

If V_in,CM increases by 50mV, what will happen to each output?

“Resistor current source” example – Common-Mode Response

Large CM

R

A ΔV^{out D} /2

g

gain of 1.94 is due to the

V R V

V V

R g

A V

D

SS m

D CM

in out CM

V

8 96 94

1 ) 50

2 (

| /

|

) 2

/(

, 1

,

Δ Δ

− + Δ =

= small R_SS

mV R mV

V g V

SS m

D CM

in

X (50 ) 1.94 96.8

) 2

/(

| 1

| _, = ⋅ =

Δ +

= Δ

⇒

Common-Mode Response with asymmetric R

assuming λ=0

ΔV_X g

ΔV_X

ΔV_in,CM = − g_m

1+ 2g_mR_SS R_D

ΔV g

ΔV_Y

ΔV_in,CM = − g_m

1+ 2g_mR_SS (R_D + ΔR_D)

m Y

X

V g R

V − Δ Δ

Δ

2

,

1

D SS

m m CM

in

Y

X

R

R g

g

V Δ

= + Δ

R_SSSS above represents the current p source – need large R_SS

Common-Mode Response with asymmetric R

CM input noise corrupts the amplified differential signal, because of the

asymmetry

For high-frequency Common-Mode input need to take into account parasitic capacitance effects, p p ,

even if R_SS is large. C₁ is contributed by M₁,M₂ and I_SSSS and contributes to the impedance “seen” by the p y CM signal.

Mismatches in W/L, V

and other transistor parameters all translate to mismatches in g

P CM

in m

D

g V V

I

=

(

− )

S ll i l

P CM

in m

D

g V V

I

=

(

− )

, Small-signal

analysis

P SS

P CM

in m

m

g V V R V

g + − =

⇒ (

)(

)

Mismatches in W/L, V

and other transistor parameters all translate to mismatches in g

P SS

P CM

in m

m

g V V R V

g

)(

)

( + − =

CM SS

m m

P

SS C

in m

m

R V g

V g

,

)

( +

=

⇒

SS m

m

P

V

R g

V g

2

1

) 1

( + +

⇒

D P

CM in

m

X

g V V R

V = −

(

− )

D P

CM in

m

Y

g V V R

V = −

(

− )

Mismatches in W/L, V

and other transistor parameters all translate to mismatches in g

Y

X V g g

V − ₁ − ₂

D SS

m m

m m

CM in

Y X

DM CM

V R

R g

g

g g

V

V A V

1 )

( _{1 2}

2 1

,

, ₋ = = − + +

Common Mode Gains Common-Mode Gains

• We have seen two types of common-

Y

X

V

A V

mode gain:

• A_V,CM : Single-ended ^{in CM}

Y CM

in X CM

V

V V

A

, ,

,

= =

V,CM g

output due to CM signal.

V

• A_V,CM-DM : Differential

V

output due to CM

Y X

DM CM

V

V

V A

V −

−

=

output due to CM

signal.

V

Common-Mode Rejection Ratio (CMRR) Definitions

|

|

SE

A

CMRR A

CMRR = =

A

A |

|

DM CM

DM diff

A

CMRR A CMRR

−

=

=

In both cases we want CMRR to be as large as possible and it translates into large as possible, and it translates into

small matching errors and R_SS as large as possible

possible

CMOS Differential Amplifiers

MOS Loads – L18

MOS Loads L18

MOS Loads MOS Loads

• (a) Diode-connected load

(b) C t S l d

• (b) Current-Source load

MOS Loads: Analysis Method MOS Loads: Analysis Method

• Differential Analysis: Use half-circuit method, with source node at virtual ground.

• Common-Mode Analysis: Again use half-circuit method, with appropriate accommodation for parallel transistors and for R

parallel transistors, and for R_SS.

MOS Loads: Differential Gain Formulas MOS Loads: Differential Gain Formulas

r r

g g

A ( ⁻¹ || || )

N n

mN

oP oN

mP mN

diff V

L W

g

r r

g g

A

) / (

)

||

||

, (

μ

−

=

)

||

,diff mN ( oN oP

V g r r

A = −

P p

N n

mP mN

L W

g g

) / (

) (

μ

−

μ

=

−

≈ ^ff

Problems with Diode connected MOS Loads Problems with Diode-connected MOS Loads

• Tradeoff among output voltage swing, voltage gain and CM input range:

and CM input range:

• In order to achieve high gain, (W/L)_P must be

decrease, thereby increasing |V_GSP-V_THP| and lowering decrease, thereby increasing |V_GSP V_THP| and lowering the CM level at nodes X and Y.

Overcoming Diode-connected Load swing problem for higher gains:

Use PMOS current sources which reduce g_m of

diode connected MOS instead of lowering (W/L) of diode-connected MOS, instead of lowering (W/L)_P of load. Gain can be increased by factor of 5.

Problems with Current Source MOS Loads Problems with Current-Source MOS Loads

• In sub-micron technologies, it’s hard to g , obtain differential gains higher than 10- 20

20.

Solution to low gain problem: Cascoding Solution to low-gain problem: Cascoding

)]

(

||

)

[( _{3 3 1 5 5 7}

1

,diff m m o o m o o

V g g r r g r r

A ≈

CMOS Differential Amplifiers

Gilbert Cell-L19

Gilbert Cell L19

Can we create a differential amplifier with voltage-controlled differential gain?

(a)is a VGA (Variable-Gain Amplifier). V_cont determines I which determines the

determines I_ss, which determines the differential gain.

Gain may be varied from 0 to some maximum value.

Can we create a differential amplifier with voltage-controlled differential gain?

What do we do if we want to vary the gain continuously from some negative value to continuously from some negative value to some positive value?

Can we create a differential amplifier with voltage-controlled differential gain?

In circuits (b) the two amplifiers have opposite differential gain simply by interchanging the

differential gain simply by interchanging the order of output subtraction)

Can we create a differential amplifier with voltage-controlled differential gain?

If I₁=I₂ then V_out,1/V_in= -g_mR_D = - V_out,2/V_in

If I d I i it di ti th i

If we vary I₁ and I₂ in opposite directions, the gains will follow along these directions.

ff ?

How should we combine the two differential outputs?

How to combine the differential outputs?

O th l ft t ll th t

On the left, we conceptually see the two voltages ADDED UP.

Gains A₁ and A₂ are voltage controlled.

How to combine the differential outputs?

Math will show the implementation method.

Does it work as intended? Can gain be varied positively as well as negatively?

If I =0 then V =g R If I₁=0 then V_out=g_mR_D. If I₂=0 then V_out= -g_mR_D. If I₁=I₂ then V_out=0 !!

Next phase in the conceptual development:

Do we really need two separate control Do we really need two separate control signals??

Recall the basic structure of a differential

lifi Th i t diff f th

amplifier: The inputs difference cause one of the MOS currents to go up, and at the same time the

t f th it MOS d b th

current of the opposite MOS goes down by the same amount Æ Let I₁ , I₂ come from diff. amp.

Gilbert Cell Gilbert Cell

Left: If |V_cont1 – V_cont2| is large we have

“current stealing” and then gain is eithercurrent stealing , and then gain is either most positive or most negative.

Gilbert Cell Gilbert Cell

Right: Actual Implementation

Gilbert Cell Gilbert Cell

V_OUT = kV_inV_cont

Applications of Gilbert Cell Applications of Gilbert Cell

• Analog Multiplier

– Mixer

– Phase Detector AM Modulation – AM Modulation

• VGA: Variable-gain amplifier

– AGC (Automatic Gain Control)

It’s a versatile general-purpose tool

Can switch input and control

signals!