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Ç­ Ž ” Ö «Y c l0 n É® Žz º Si 3 N 4 /Si ü; c ” Ö «Y c lc Ü R P ê s– ¥ ¹ Å= k Bi 3.25 La 0.75 Ti 3 O 12 U c lT c l8 ý

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(1)

3 n

Ç­ Ž ” Ö «Y c l0 n É® Žz º Si 3 N 4 /Si  ü; c ” Ö «Y c lc Ü R P ê s– ¥ ¹ Å= k Bi 3.25 La 0.75 Ti 3 O 12 U c lT c l8 ý

 ¹

ÅM X ì Ä — ¤V R Ë; c å ¾ ˔ X ¢ Ž ì ŏ Œ

T + ä \ 8 ; · ƒ ‘ š< ' Ö < · z ª <+ ä  ·  ‘ ž  ¢ 9­ £ · ™ »® £* å  · ƒ ‘ š  ¢ 9" k

"

fy © œ@ /† < Ɠ § Ó ü t o † < Æõ , " fÖ  ¦ 121-742 (2004¸   2 Z 4 16{ 9  ~ à Î6 £ §)

y

© œÄ »„  ^ ‰ Ó ü t| 9 – Ð x – Ð : £ ¤$ í s  Ä ºÃ º “ ¦  H ï ß –À Ó ì  rF G° ú כ`  ¦ t “ ¦ e ”   H Bi

3.25

La

0.75

Ti

3

O

12

(BLT)

~ Ã

Ì} Œ •`  ¦ pulsed laser deposition Z O \  _ K  í ß –™ è ì  r0 Al  200

C mTorr, 400

C “ : r • ¸\ " f 7 £ x‚ à Ìr (  



. BLT(2000 ˚ A)/Si

3

N

4

(150 nm)/p-Si(111) ½ ¨› ¸_  r ¼ # \ " f MFIS capacitor\  ¦ 0 Aô  Ç insulator– Ð

"

f Si

3

N

4

  H a % ~“ É r > €   : £ ¤$ í `  ¦ t  9, \ P % ƒo  “ : r • ¸\    É r BLT~ à Ì} Œ •_  capacitance-voltage : £ ¤$ í õ  memory window ° ú כ`  ¦ ƒ  ½ ¨ % i  . BLT ~ à Ì} Œ •_  Ê ê\ P % ƒo  “ : r • ¸ 7 £ x † < Ê\     c» ¡ ¤ ~ ½ ӆ ¾ ÓÜ ¼– Ð_    

&

ñ $ í  © œ`  ¦ S X ‰ “   % i “ ¦, 1 l x r \   © œ@ /& h Ü ¼– Ð ± ú “ É r † ½ ӄ  > ° ú כ`  ¦ ° ú   H c» ¡ ¤ ~ ½ ӆ ¾ Ó\ " f_  memory window° ú כ

“ É

r y Œ ™™ è† < Ê`  ¦ · ú ˜ à º e ” % 3  . 700

C \ P % ƒo  õ & ñ `  ¦  • 2 ; ~ à Ì} Œ •_  sweep voltage\  ¦ 3 V, 5 V, 7 V, 10 V

–

Ð 7 £ x r ~  ´  â Ä º memory window ° ú כ“ É r y Œ •y Œ • 0.2 V, 0.36 V, 0.8 V, 1V – Ð 7 £ x  % i  .

PACS numbers: 77.80.-e, 77.80.Dj, 77.90.+k

Keywords: ` O Û ¼Y Us $  7 £ x‚ à ÌZ O , y © œÄ »„  ^ ‰ „  >  à Ô ½ ™t Û ¼' , Bi

3.25

La

0.75

Ti

3

O

12

I. " e  ] Ø

y

© œÄ »„  ^ ‰ B j— ¸o (FRAM)  H y © œÄ »„  ^ ‰ ~ à Ì} Œ •_  ì  rF Gì ø Í

„

 õ  Õ ª s § 4 : £ ¤$ í (hysteresis)`  ¦ s 6   x # Œ q 6 fµ 1 Ï$ í , “ ¦ 5

Å q, “ ¦| 9 & h • ¸, “ ¦? /½ ¨$ í , $ ™ èq  „  § 4  o\  ¦ z  ´‰ & ³½ + É Ã º e ” 



 H s  © œ& h “   B j— ¸o – Ð" f y Œ •F g`  ¦ ~ à Îl  r  Œ • # Œ Õ ª ƒ  ½ ¨

>

hµ 1 Ïs   Ö ¸µ 1 Ïy  ”  ' Ÿ ÷ &“ ¦ e ”   [1].

‰ &

³F  z  ´6   x o÷ &“ ¦ e ”   H y © œÄ »„  ^ ‰ B j— ¸o   H 1T/1C + þ A I

 [2]– Ð" f DRAM(dynamic random access memory) ½ ¨

›

¸ü <  _  ° ú  “ É r ½ ¨› ¸\  ¦ t l  M :ë  H \   6   x ÷ &“ ¦ e ”   H / B N

&

ñ í  H " f_   H    o\ O s  ™ è \  ¦ ] j Œ •½ + É Ã º e ” Ü ¼  ™ è  €  

&

h _  7 £ x , / B N& ñ  © œ_  4 Ÿ ¤¸ ú š$ í , & ñ ˜ Ð\  ¦ { 9   H õ & ñ \ " f ì ø Í

„ 

   H ì  rF G_   â Ä º { 9 é ß – { 9 “ ¦  €   ì  rF G s  ì ø Í@ / ~ ½ ӆ ¾ ÓÜ ¼

–

Ð  7 # Q X <s '  õ ÷ &# Q, { 9 “ ¦ è ß – Ê ê\   H ì ø Í@ / ~ ½ Ó

†

¾ Ó_  „  > \  ¦ “   # Œ œ íl   © œI – Ð X <s ' \  ¦ F l 2 Ÿ ¤ K 



   H DRO(destructive read out) ~ ½ Ód ” `  ¦ G × þ ˜½ + É Ã ºµ 1 Ú

\

 \ O    H   H‘ : r& h “   ë  H ] j& h `  ¦ î ß –“ ¦ e ”   [3].

ì

ø ̀  , F K5 Å q-y © œÄ »„  ^ ‰-ì ø ͕ ¸^ ‰ „  > + þ A à Ô ½ ™t Û ¼'  (MFSFET, metal-ferroelectric-semi conductor field effect transistor) ½ ¨› ¸  H q 6 fµ 1 Ï$ í B j— ¸o e ” õ  1 l x r \  X <s ' 

\

 ¦ { 9 “ ¦  " f• ¸ $  © œ ) a X <s ' _  õ  { 9 # Q t  · ú §  H NDRO(non-destructive read out) ~ ½ Ód ” Ü ¼– Ð é ß –{ 9  à Ô ½ ™t 

E-mail: [email protected]

Û

¼'  ! s q + þ AI “   l ‘ : r ½ ¨$ í \  _ ô  Ç “ ¦| 9 & h  o\  Ä »o ô  Ç  © œ

&

h `  ¦ t m “ ¦ e ” # Q ‰ & ³F  F g# 3 0 A >  ƒ  ½ ¨ s À Ò# Qt “ ¦ e ”

  [4].

Õ

ª Q  MFSFET ] j Œ •_   © œ  H ë  H ] j& h “ É r @ / Òì  r_  í

ß – oÓ ü t >  y © œÄ »„  ^ ‰[ þ t s  z  ´o – B H õ  ì ø Í6 £ x # Œ z  ´o – B H í ß –



oÓ ü t`  ¦ + þ A$ í l  M :ë  H \  y © œÄ »„  $ í `  ¦ { 9 >  ÷ & 9,   

"

f > €  \ " f• ¸ " é ¶  & h Ü ¼– Ð î ß –& ñ ÷ &t  · ú §>   ) a  . s  Qô  Ç ë

 H ] j& h `  ¦ K    l  0 AK  MFISFET(metal-ferroelectric- insulator-semiconductor field effect transistor) ½ ¨› ¸\  @ / ô 

Ç ƒ  ½ ¨ s À Ò# Qt “ ¦ e ”  . ‘ : r ƒ  ½ ¨\ " f  H y © œÄ »„  ^ ‰ Ó ü t

| 9

õ  z  ´o – B H  s \  ¢ - aØ  æ8 £ x(buffer layer) Ü ¼– Ð" f SiO

2

\  q

K  q “ §& h  Z  }“ É r Ä »„    © œÃ º° ú כ`  ¦ t  9 [6] í ß –™ è S X ‰í ß –  © œ

#

4 (oxygen-diffusion barrier)Ü ¼– Ð" f_  % i ½ + É`  ¦   H Si

3

N

4

] X

ƒ  ^ ‰8 £ x`  ¦ ¶ ú š{ 9  # Œ a % ~“ É r > €   : £ ¤$ í `  ¦ % 3 “ ¦  % i  .

¢

¸ô  Ç y © œÄ »„  ^ ‰ Ó ü t| 9 – Ð þ j  H \  La`  ¦ ' ‘ ô  Ç BiT ((Bi,La)

4

Ti

3

O

12

, BLT)~ à Ì} Œ •s  ƒ  ½ ¨÷ &% 3   H X <, s   H l ” > r _  Bi>  8 £ x © œ½ ¨› ¸\  ¦ t   H y © œÄ »„  ^ ‰ ~ à Ì} Œ •˜ Ð   8  H ï ß – À

Óì  rF G`  ¦ t “ ¦ SBT ~ à Ì} Œ •˜ Ð   8 ± ú “ É r “ : r • ¸\ " f 7 £ x‚ à Ì

½ +

É Ã º e ” `  ¦ ÷  rë ß –  m   x – Ð : £ ¤$ í • ¸ Ä ºÃ ºô  Ç   õ \  ¦ % 3 

#

Q? /# Q PZT~ à Ì} Œ •õ  SBT~ à Ì} Œ •_    & h `  ¦ 1 l x r \  ˜ Ð ¢ - a ½ + É Ã

º e ”   H  כ Ü ¼– Ð ˜ Г ¦÷ &% 3   [7]. ‘ : r  7 Hë  H \ " f  H \ x % 7 ˜r 

\ O

ô  Ç ~ à Ì} Œ • $ í  © œs  6   x s ô  Ç PLD(pulsed laser deposition)

~

½ ÓZ O Ü ¼– Ð y © œÄ »„  ^ ‰ Ó ü t| 9  ×  æ BLT\  ¦ MFIS ½ ¨› ¸\  & h 6   x 

“

¦  % i  . BLTü < z  ´o – B Hç ß –_  ì ø Í6 £ x`  ¦ } Œ •Ü ¼ 9 a % ~“ É r > 

-90-

(2)

€ 

 : £ ¤$ í `  ¦ % 3 l  0 AK  ¢ - aØ  æ8 £ x] X ƒ  ^ ‰– Ð" f Si

3

N

4

\  ¦  6   x 

#

Œ BLT(2000 ˚ A)/Si

3

N

4

(150 nm)/p-Si(111) ½ ¨› ¸ r ¼ # \ 

"

f_  \ P % ƒo  “ : r • ¸\    É r BLT ~ à Ì} Œ •_  C-V(capacitance- voltage) : £ ¤$ í õ  memory window : £ ¤$ í `  ¦ 8 £ ¤& ñ % i  .

II. ÷ m Ç] M ö õ m Í U ê s0 n É

Si l ó ø Í“ É r p-type Si(111) wafer 0 A\  15 nm ¿ ºa  _

 Si

3

N

4

 buffer layer– Ð 7 £ x‚ à ̝ ) a l ó ø Í`  ¦ ½ ¨{ 9  % i  .

MIS(metal-insulator-semiconductor) capacitor ½ ¨› ¸\ " f _

 y © œ„  ^ ‰ ~ à Ì} Œ •õ  ì ø ͕ ¸^ ‰ > €    s _  buffer8 £ x Ü ¼– Ð" f  H Si l ó ø Í 0 A\ " f \ P & h Ü ¼– Ð î ß –& ñ  9, ± ú “ É r > €   „    x 9 

•

¸(interface trap density)\  ¦ ° ú   H q & ñ | 9 (amorphous)  © œ I

_  ] X ƒ  ^ ‰ Ä »6   x  . l ó ø Í“ É r Ä »l [ j& ñ x 9 ³ ðï  r RCA Z O

 [8]`  ¦ s 6   x # Œ [ j' ‘  % i  . Si l ó ø Í_  native í ß – o} Œ •

`

 ¦ ] j  l  0 A # Œ Ô  ¦í ß – 6   xÓ  o(HF solution)Ü ¼– Ð F  Ø Ô

>

 [ j& ñ ô  Ç + ' | › ¸ x 9 rinse õ & ñ `  ¦ ' Ÿ  % i  .

MFIS capacitor ½ ¨› ¸\ " f_  y © œÄ »„  ^ ‰ Ó ü t| 9 – Ð BLT\  ¦ 7

£

x‚ Ã Ì l  0 AK  248 nm_   © œ`  ¦ ° ú   H KrF excimer Y Us 

$

\  ¦  6   x # Œ PLD ~ ½ ÓZ O Ü ¼– Ð ~ à Ì} Œ •`  ¦ 7 £ x‚ Ã Ì % i  . 200 mTorr_  í ß –™ è · ú š§ 4 õ  400

C_  l ó ø Í “ : r • ¸\ " f 7 £ x‚ à ̝ ) a

~ Ã

Ì} Œ •\  @ / # Œ 600∼700

C_  “ : r • ¸ # 3 0 A\ " f 1r ç ß – 1 l xî ß – Ê

ê\ P % ƒo \  ¦ % i  . 7 £ x‚ à ̝ ) a ~ à Ì} Œ •_  \ P % ƒo  Ê ê_    & ñ $ í x 9

$ í  © œ    o\  ¦ · ú ˜ ˜ Ðl  0 A # Œ Rigaku _  XRD(x-ray diffraction)  © œq \  ¦ s 6   x % i  . 7 £ x‚ à ̝ ) a ~ à Ì} Œ •_  ¿ ºa , ³ ð

€ 

 x 9 é ß –€   + þ A © œ“ É r SEM(scanning electron microscope)`  ¦ :

Ÿ

x K  › ' a¹ 1 Ï % i  .

~ Ã

Ì} Œ •_  „  l & h  : £ ¤$ í `  ¦ ¨ î  l  0 AK  \ P  7 £ x‚ à Ìl  (thermal evaporator)\  ¦  6   x # Œ Â Ò „  F G Ü ¼– Ð" f Al`  ¦ 7

£

x‚ à Ìr v “ ¦,  © œÂ Ò „  F G Ü ¼– Ð" f  H shadow mask\  ¦  6   x

# Œ t 2 £ § s  150 µm“   f ”  â `  ¦ ° ú   H Au dot „  F G

`

 ¦ + þ A$ í r (   . & ñ „  6   x| ¾ Ó-„  · ú š(C-V) : £ ¤$ í “ É r HP4194A Impedance/gain-phase analyzer\  ¦ s 6   x # Œ 0.05 volt ç ß –

 

Ü ¼– Ð  s # QÛ ¼ „  · ú š`  ¦  Ë ¨# Q ŠҀ  " f 1 MHz_  Å Ò  Ã

º– Ð  € ª œô  Ç „  · ú š # 3 0 A\ " f sweep % i  .

III. + s ÇÊ Ý õ m Í À X Ø8 ý

Fig. 1 ? / Ò\  e ”   H (a)   Õ ªa Ë >õ  ° ú  s  Au/Si

3

N

4

/p- Si(111)/Al ½ ¨› ¸_  capacitor\  ¦ + þ A$ í ô  Ç Ê ê, C-V : £ ¤$ í `  ¦ 8 £ ¤

&

ñ # Œ ˜ Ѐ Œ ¤ . Fig. 1“ É r 15 nm_  Si

3

N

4

¿ ºa – Ð C-V\  ¦ 8 £ ¤

&

ñ ô  Ç   õ s  . C-V / B G‚  \ " f s § 4 / B G‚  s  „  ) €     t

 · ú §6 £ §`  ¦ ^  ¦ à º e ”   H X < s   H ] X ƒ  ^ ‰ü < ì ø ͕ ¸^ ‰ > €  \  ” > r

Fig. 1. Capacitance-voltage measurements of Au/

Si

3

N

4

/Si/Al MIS structures at various frequencies.

F

   H trap \  „    Ÿ í S \ ‰(trapping), ~ ½ ÓØ  ¦(emission) ÷ &



 H 1 p x_  charge injection ‰ & ³ © œs  \ O Ü ¼ 9, Si

3

N

4

ü < Si_  > 

€ 

  © œI  ¢ ¸ô  Ç € ª œ  ñ† < Ê`  ¦ ´ ú ˜K ï  r  . y Œ • : £ ¤$ í “ É r  € ª œô  Ç Å Ò

à º % ò % i \ " f ' Ÿ  # Œ& ’ “ ¦, C-V 8 £ ¤& ñ Ü ¼– Ð ¶ ú ˜( R˜ Ð| X <

SiO

2

\  q K  q “ §& h  Z  }“ É r Ä »„    © œÃ º° ú כ`  ¦ t  9, í ß –™ è S X

‰í ß –  © œ# 4  % i ½ + É`  ¦   H Si

3

N

4

  H ] X ƒ  8 £ x Ü ¼– Ð" f a % ~“ É r > €   :

£

¤$ í `  ¦ f ” `  ¦ S X ‰ “   % i  .

PLDZ O Ü ¼– Ð 15 nm_  ¿ ºa \  ¦ ° ú   H Si

3

N

4

/p-type Si l  ó

ø Í0 A\  BLT ~ à Ì} Œ •`  ¦ 7 £ x‚ à Ìr (   . Fig. 2  H 200 mTorr_  í

ß –™ è · ú š§ 4 õ  400

C_  l ó ø Í “ : r • ¸\ " f 7 £ x‚ à ̝ ) a BLT ~ Ã Ì }

Œ •\  @ / # Œ 600∼700

C_  “ : r • ¸ # 3 0 A\ " f 1r ç ß – 1 l xî ß – Ê

ê\ P % ƒo \  ¦ ô  Ç XRD patterns  . \ P % ƒo  „  _  ~ à Ì} Œ •“ É r (117)€  Ü ¼– Ð Ä º‚  C † ¾ ӝ ) a ` …– ÐÚ ÔÛ ¼ s à Ô(perovskite)  © œ ë

ß – › ' a¹ 1 ϝ ) a ì ø ̀   Ê ê\ P % ƒo  “ : r • ¸ Z  }  f ” \     c» ¡ ¤ ~ ½ Ó

†

¾ ÓÜ ¼– Ð C † ¾ Ó÷ &# Qf ” `  ¦ › ' a¹ 1 Ͻ + É Ã º e ”  . 650

C ü < 700

C

\ P

% ƒo  õ & ñ \ " f  H (117)€   s ü @\  c» ¡ ¤ ~ ½ ӆ ¾ ÓÜ ¼– Ð C † ¾ ӝ ) a

Fig. 2. XRD θ-2θ scans for as-deposited, 600

C, 650

C

and 700

C post annealed BLT thin films.

(3)

(006), (008), (0010), (0014), (022)_   r] X  x ß ¼[ þ t s  › ' a

¹ 1

Ï÷ &% 3  . s   H memory window° ú כ\  % ò † ¾ Ó`  ¦ Å Ò>  H † d`  ¦ S X

‰ “  ½ + É Ã º e ”  .

y

Œ

• ~ à Ì} Œ •_  \ P % ƒo  õ & ñ \    É r ³ ð€   x 9 é ß –€   SEM  

”

 `  ¦ Fig. 3 \ " f ˜ Ð# Œï  r  . \ P % ƒo  õ & ñ `  ¦  u t  · ú §“ É r

~ Ã

Ì} Œ •“ É r Fig. 3(a) ü < ° ú  s  " é ¶+ þ A_  · ú ˜Ì q ts (grain)[ þ t – Ð ½ ¨$ í

÷

&# Q e ” Ü ¼ 9 \ P % ƒo  “ : r • ¸ 600

C ü < 700

C Ü ¼– Ð  © œ5 p x 

€ 

 · ú ˜Ì q ts _  ß ¼l   H y Œ •y Œ • Fig. 3(b)ü < 3(c)\ " f ^  ¦ à º e ”  1

p

w s  7 £ x   ) a  . s   H y © œÄ »„  ^ ‰ \ P % ƒo  “ : r • ¸\     · ú ˜ Ì q

ts  " f– Ð Ó ü æ u   H ‰ & ³ © œ`  ¦ ˜ Ð# ŒÅ ғ ¦ e ”  . Fig. 3(d)  H Si l ó ø Í 0 A\  15 nm_  ¿ ºa – Ð + þ A$ í  ) a Si

3

N

4

ü < 2000 _  ¿ º a

– Ð 7 £ x‚ à ̝ ) a BLT ~ à Ì} Œ •_  é ß –€  `  ¦ ˜ Ð# Œï  r  .

„ 

l & h “   : £ ¤$ í `  ¦ ¶ ú ˜( R˜ Ðl  0 AK   © œÂ Ò „  F G“ É r f ”  â 150 µm_  Au „  F G`  ¦ + þ A$ í # Œ Au/Bi

3.25

La

0.75

Ti

3

O

12

/Si

3

N

4

/Si_  MFIS capacitor ½ ¨› ¸\  ¦ ¢ - a$ í % i  . Fig. 4, 5  H MFIS capacitor ½ ¨› ¸\ " f_  C-V : £ ¤$ í `  ¦ ˜ Ð# ŒÅ ҍ  H hysteresis loop s  . Õ ªa Ë >_  C-V : £ ¤$ í \ " f · ú ˜ à º e ” 1 p w s  y

© œÄ »„  ^ ‰_  ì  rF Gì ø ̈́  \  _ ô  Ç ‰ & ³ © œ`  ¦   ? /  H r > ~ ½ ӆ ¾ Ó _  C-V s § 4 / B G‚  s  › ' a¹ 1 Ï÷ &% 3  . { 9 ì ø Í& h Ü ¼– Ð y © œÄ »„  ^ ‰

~ Ã

Ì} Œ •\  “  ÷ &  H „  · ú šs  7 £ x ½ + Éà º2 Ÿ ¤ y © œÄ »„  ^ ‰_  ì  rF G° ú כ õ

 † ½ ӄ  · ú š(coercive voltage)° ú כs  7 £ x  >  ÷ &# Q s § 4 / B G

‚ 

_  ; Ÿ ¤“   B j— ¸o  ˜ û ¶ • ¸Ä º ° ú כs  7 £ x  >   ) a  . s § 4  / B G

‚ 

_  ; Ÿ ¤(∆V )“ É r ~ à Ì} Œ •_  ¿ ºa ü < † ½ ӄ  l  © œ_  Y  L \  q Y V  9 Õ ª › ' a >   H  6 £ § õ  ° ú    [9].

∆V = 2E

c

d (1)

#

Œl " f E

c

  H y © œÄ »„  ^ ‰_  † ½ ӄ  l  © œs “ ¦, d  H y © œÄ »„  ^ ‰

~ Ã

Ì} Œ •_  ¿ ºa \  ¦    · p .  – Ð s  MFIS ½ ¨› ¸\ " f C-V /

B

G‚    © œ_  s § 4  ‰ & ³ © œs  l % 3  ™ è – Ð_  6 £ x6   x 0 p x$ í `  ¦ ˜ Ð

Fig. 3. Surface SEM images for (a) as-deposited, (b) 600

C, (c) 700

C post annealed BLT thin films. Fig. 3(d) shows the cross-sectional view of BLT/Si

3

N

4

/Si struc- tures.

Fig. 4. Capacitance-voltage measurements for Au/BLT/Si

3

N

4

/Si MFIS structures treated at vari- ous post annealing temperatures.

#

Œï  r  . > s à Ô „  F G \  „  · ú š`  ¦   # Q Å Òt  · ú §€ Œ ¤`  ¦ M :   



  H „  ^ ‰_  & ñ „   6   x| ¾ Ó_  s   H y © œÄ »„  ^ ‰ # Q‹ "  „  l 

&

h  õ & ñ `  ¦   % 3 Ö ¼ \  _ K    & ñ  ) a  . s ü < ° ú  “ É r & ñ „   6   x

|

¾ Ó_  s   H ì ø ͕ ¸^ ‰ü < y © œÄ »„  ^ ‰_  > €  s  # Q‹ "   © œI “   t

, 7 £ ¤ » ¡ ¤& h   © œI “  ,  m €   “ ¦° ú ˜  © œI “  \       

&

ñ ÷ & 9, s   H / B I > €  _   Ø Ô> h x 9 • ¸(carrier density)\  y

© œÄ »„  ^ ‰_  % ò † ¾ Ó\  _ ô  Ç s  e ” 6 £ §`  ¦ ˜ Ð# Œï  r  .   

"

f „  · ú šs  0“    © œI \ " f• ¸ > €  `  ¦ â ìØ Ô  H „  À Ó y © œÄ »„  

^

‰\  _ K " f › ¸] X | ¨ c à º e ” “ ¦, s  " é ¶ o – Ð l % 3  ™ è – Ð_  6

£

x6   x s  0 p x K ”    [10].

MFISFET + þ AI _  y © œÄ »„  ^ ‰ B j— ¸o _  l % 3  : £ ¤$ í _   

”

 `  ¦ Z  } s l  0 AK " f  H memory window  9 þ t à º2 Ÿ ¤ a % ~  .

Õ

ª Q  y © œÄ »„  ^ ‰ } Œ •s  c» ¡ ¤ Ü ¼– Ð C † ¾ Ó½ + É  â Ä º ± ú “ É r † ½ ӄ  > 

(4)

Fig. 5. Capacitance-voltage measurements of 700

C post annealed Au/BLT/Si

3

N

4

/Si MFIS structures at various sweep voltages.

–

Ð “  K  $ „  · ú š ½ ¨1 l x \  B Ä º Ä »o  >  ÷ &  H ì ø ̀   B j— ¸o 

˜ û

¶ • ¸Ä º ° ú כ“ É r d ”  (1)\  _ K   Œ • t >   ) a  .

Fig. 4  H BLT ~ à Ì} Œ •_  Ê ê\ P % ƒo  “ : r • ¸\    É r C-V : £ ¤$ í

`

 ¦    · p . Ê ê\ P % ƒo  “ : r • ¸ Z  }  | 9 à º2 Ÿ ¤ B j— ¸o  ˜ û ¶ • ¸ Ä

º ° ú כs   Œ • t   H  ⠆ ¾ Ó`  ¦ ^  ¦ à º e ”   H X <, s   H Ê ê\ P % ƒo 

“

: r • ¸ Z  }  | 9 à º2 Ÿ ¤ c» ¡ ¤ ~ ½ ӆ ¾ ÓÜ ¼– Ð_  $ í  © œs  s À Ò# Q4 R † ½ Ó

„ 

l  © œs   © œ@ /& h Ü ¼– Ð  Œ •“ É r c» ¡ ¤ ~ ½ ӆ ¾ Ó_  $ í  © œs  s À Ò# Qt 

“

¦ e ”   H 700

C_  Ê ê\ P % ƒo  õ & ñ \ " f B j— ¸o  ˜ û ¶ • ¸Ä º ° ú כ s

  © œ  Œ •6 £ §`  ¦ · ú ˜ à º e ”  . \ P % ƒo  õ & ñ `  ¦  u t  · ú §“ É r

~ Ã

Ì} Œ •_   â Ä º B j— ¸o  ˜ û ¶ • ¸Ä º ° ú כ“ É r 1.31 V s “ ¦, 600

C Ê ê

\ P

% ƒo  õ & ñ \ " f  H 0.78 V, 700

C \ " f  H 0.36 V_  B j— ¸ o

 ˜ û ¶ • ¸Ä º ° ú כ`  ¦   Í Ç x .

Õ

ªA á Ô\ " f ^  ¦ à º e ” 1 p w s  “ : r • ¸\     C-V / B G‚  s  ý a Ä

º– Ð s 1 l x ÷ &  H  כ s  S X ‰ “  ÷ &% 3  . Fig. 4(a)ü < (b)_  as- deposited õ  600

C \ P % ƒo  õ & ñ `  ¦  • 2 ; ~ à Ì} Œ •`  ¦ q “ § 

€ 

 C-V / B G‚  s  6 £ §_  „  · ú šÜ ¼– Ð s 1 l x ÷ &  H  כ `  ¦ S X ‰ “  ½ + É Ã º e ”

  H X < s   H y © œÄ »„  ^ ‰ F « Ñ_    & ñ  o\  _ ô  Ç ‰ & ³ © œÜ ¼– Ð ë

ß – ç ß –Å Ò÷ &  H ì ø ̀  \  € ª œ_  „  · ú šÜ ¼– Ð s 1 l x ÷ &  H 700

C \ P 

%

ƒo   ) a ~ à Ì} Œ •“ É r \ P % ƒo  “ : r • ¸ Z  }  t €   ] X ƒ  ^ ‰ü < ì ø ͕ ¸

^

‰ > €  \  ” > r F    H interface trap \  Ÿ í S \ ‰ ÷ &  H „   \  _  ô 

Ç ‰ & ³ © œs   [11]. ¢ ¸ô  Ç, Z  }“ É r \ P % ƒo  “ : r • ¸\  _ ô  Ç BLT

?

/\  ” > r F    H Bi " é ¶  _  S X ‰í ß –\  @ /ô  Ç % ò † ¾ ÓÜ ¼– Ð > €  \  acceptor concentration s  7 £ x ÷ &“ ¦ s – Ð “  K  depleted area \  7 £ x ÷ &  H „   | ¾ Ó M :ë  H s   [12].

Fig. 5  H 700

C_  Ê ê\ P % ƒo  õ & ñ `  ¦  • 2 ; ~ à Ì} Œ •`  ¦ 3 V, 5 V, 7 V, 10 V – Ð sweep½ + É M : C-V : £ ¤$ í `  ¦   ? /  H

 כ

Ü ¼– Ð s  M : B j— ¸o  ˜ û ¶ • ¸Ä º  H 0.2 V, 0.36 V, 0.8 V, 1 V% i  . “     H „  · ú šs  7 £ x ½ + Éà º2 Ÿ ¤ B j— ¸o  ˜ û ¶ • ¸Ä º ° ú כ

•

¸ 7 £ x    H X < s   H ± ú “ É r „  · ú š\ " f  H y © œÄ »„  ^ ‰ ~ à Ì} Œ •? /

\

 ” > r F    H dipole[ þ t_  { 9  Òë ß –s  ô  Ç ~ ½ ӆ ¾ ÓÜ ¼– Ð C \ P ÷ &% 3  t

ë ß – “     H „  · ú š`  ¦ 7 £ x r ~  ´Ã º2 Ÿ ¤ dipole[ þ t s  @ / Òì  r s

 ô  Ç ~ ½ ӆ ¾ ÓÜ ¼– Ð & ñ § > = % i 6 £ §`  ¦ _ p ô  Ç . ¢ ¸ô  Ç “  „  · ú š s

 7 £ x ½ + Éà º2 Ÿ ¤ B j— ¸o  ˜ û ¶ • ¸Ä º ° ú כs  7 £ x † < ʓ É r 0 A\ " f• ¸

ú ˜( R˜ Ѐ Œ ¤ . s   H „  + þ A& h “   y © œÄ »„  ^ ‰_  ì  rF Gì ø ̈́  (dipole switching) \  _ ô  Ç C-V s § 4  ‰ & ³ © œ`  ¦ S X ‰ “  r & ï  r  .

IV. + s Ç Â ] Ø

MFISFET+ þ A y © œÄ »„  ^ ‰ B j— ¸o \  & h 6   x l  0 AK  PLD

~

½ ÓZ O Ü ¼– Ð BLT ~ à Ì} Œ •`  ¦ 7 £ x‚ à Ìr v “ ¦, BLT/Si

3

N

4

28 £ x ~ à Ì} Œ •

`

 ¦ ] j› ¸ % i  . MIS capacitor_  C-V 8 £ ¤& ñ Ü ¼– РÒ'  hys- teresis ‰ & ³ © œs     t  · ú §€ Œ ¤Ü ¼Ù ¼– Ð charge injection ‰ & ³



© œs  { 9 # Q t  · ú §6 £ §`  ¦ · ú ˜ à º e ”  .   " f MFIS capaci- tor\  ¦ 0 Aô  Ç insulator– Ð" f 15 nm_  ¿ ºa \  ¦ ° ú   H Si

3

N

4

  H a

% ~“ É r > €   : £ ¤$ í `  ¦   ? /% 3  . BLT ~ à Ì} Œ • + þ A$ í õ & ñ \ " f Ê

ê\ P % ƒo  “ : r • ¸ 7 £ x † < Ê\     \ P % ƒo  „  _  (117) €  Ü ¼

–

Ð_  Ä º‚   C † ¾ Ó$ í \ " f \ P % ƒo  Ê ê c» ¡ ¤ Ü ¼– Ð   & ñ $ í s  Ò q t  



.

Au/BLT/Si

3

N

4

/Si ½ ¨› ¸\ " f_  Si

3

N

4

¿ ºa \    É r C- V : £ ¤$ í `  ¦ S X ‰ “  K  ‘ : r   õ  \ P % ƒo  “ : r • ¸ 7 £ x † < Ê\     memory window ° ú כ“ É r y Œ ™™ è % i  . s   H y © œÄ »„  ^ ‰ ~ à Ì} Œ •

\

 “  ÷ &  H „  · ú šõ  \ P % ƒo  “ : r • ¸\    É r ~ à Ì} Œ •_    & ñ $ í õ

 ƒ  › ' a s  e ”  . 700

C \ P % ƒo  õ & ñ `  ¦  • 2 ; ~ à Ì} Œ •_  3 V, 5 V, 7 V, 10 V – Ð sweep voltage 7 £ x \     memory window ° ú כ“ É r y Œ •y Œ • 0.2 V, 0.36 V, 0.8 V, 1 V– Ð 7 £ x  % i 



. s ü < ° ú  “ É r : £ ¤$ í   õ – Ð ^  ¦ M :, Au/BLT/Si

3

N

4

/Si ½ ¨

›

¸_  28 £ x ~ à Ì} Œ •s  MFIS FET ™ è \  & h 6   x 0 p x† < Ê`  ¦ · ú ˜ à º e ”

 .

P c

p 8 ý ò k >

s

  7 Hë  H“ É r 2000¸  • ¸ ô  Dz D G† < ÆÕ ü t”  < É ª F é ß –_  t " é ¶ \  _  

#

Œ ƒ  ½ ¨÷ &% 3 6 £ §(KRF-2000-015-DP0135).

Y c

p w Š à U Ø ”  ô

[1] J. F. Scott, Ferroelectr. Rev. 1, 1 (1998).

[2] S. S. Eaton, D. B. Butler, M.Parris, D. Wilson and H. McNeillie, IEEE Int. Solid-State Circuits Conf.

Tech. Digest 130 (1998).

[3] C. H. Seager, D. C. Mclntyre, W. L. Warren and B.

A. Tuttle, Appl. Phys. Lett. 68, 2660 (1996).

(5)

[4] S. Mathews, R. Ramesh and T. Venkateson, J.

Benedetto, Science 276, 238 (1997).

[5] S. Y. Wu, Ferroelectrics II, 379 (1976).

[6] E. Tokumitsu, G. Fujii and H. Ishiwara, Appl. Phys.

Lett. 75, 575 (1999).

[7] B. H. Park, B. S. Kang, S. D. Bu, T. W. Noh, J.

Lee and W. Jo, Nature 401, 682 (1999).

[8] K. Werner and D. A. Puotinen, RCA Review 31, 187 (1970).

[9] S. L. Miller and P. J. McWhorter. J. Appl. Phys.

72, 5999 (1992).

[10] S. Y. Wu, IEEE Trans. Electron Devices 21, 499 (1974).

[11] S. M. Sze, Physics of Semiconductor Devices, 2nd Ed. (Wiley, New York, 1981), p. 395.

[12] B.-C. Lan C.-Y. Huang and S.-Y. Chen, J. Appl.

Phys. 94, 6735 (2003).

Electrical Properties of Ferroelectric Bi 3.25 La 0.75 Ti 3 O 12 Thin Films Pulsed Laser Deposited on Si 3 N 4 /Si Substrates

Jungsuk Lee, Jaemoon Pak, Eunjung Ko, Kuangwoo Nam, Jooyoung Kim and Gwangseo Park

Department of Physics, Sogang University, Seoul 100-611

(Received 16 February 2004)

Ferroelectric Bi

3.25

La

0.75

Ti

3

O

12

(BLT) thin films which are were fatigue-free and possess large remnant polarization values were deposited by using the pulsed laser deposition method at an oxygen pressure of 200 mTorr and a deposition temperature of 400

C. As for the insulator layer used in the MFIS capacitors, Si

3

N

4

was found to be appropriate with good interfacial properties. The capacitance-voltage measurements and memory window characteristics of the Au/BLT/Si

3

N

4

/Si/Al capacitor structures will be discussed. Preferable crystallizations along the c-axis with respect increasing annealing temperatures were observed, and resulted in decreased memory window values.

As the sweep voltages were increased to 3 V, 5 V, 7 V, and 10 V, for the films annealed at 700

C, the memory window values were found to increase to 0.2 V, 0.36 V, 0.8 V, and 1 V, respectively.

PACS numbers: 77.80.-e, 77.80.Dj, 77.90.+k

Keywords: Pulsed laser deposition, Ferroelectric gated FETs, BLT thin films

E-mail: [email protected]

수치

Fig. 1. Capacitance-voltage measurements of Au/
Fig. 4. Capacitance-voltage measurements for Au/BLT/Si 3 N 4 /Si MFIS structures treated at  vari-ous post annealing temperatures.
Fig. 5. Capacitance-voltage measurements of 700 ◦ C post annealed Au/BLT/Si 3 N 4 /Si MFIS structures at various sweep voltages.

참조

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