Implementation of BOC Signal Acquisition Using a DSP/FPGA Board
Yu-Hsuan Chen, Jyh-Ching Juang and Tsai-Ling Kao
Department of Electrical Engineering, National Cheng Kung University Tainan, Taiwan
(E-mail: shinge.chen@msa.hinet.net )
Abstract
Future GNSS signal using BOC modulation brings the advantages of positioning accuracy and multipath rejection.
However, the BOC signal has an ambiguous autocorrelation function that complicates the process of acquisition.
Three techniques that solve the ambiguous problem are BPSK-like, Sub Carrier Phase Cancellation, and Bump Jumping. In this paper, these methods are implemented by means of a DSP/FPGA board. Moreover, an experiment is conducted to examine and compare the performance of these techniques.
Keywords: BOC signal, Acquisition, Tracking, GNSS receiver
1. Introduction
The BOC modulation which will be used in Galileo and modernized GPS not only brings some advantages such as positioning accuracy and multipath rejection, but also brings a challenge in the process of acquisition and tracking because of its autocorrelation function. The autocorrelation function of BOC modulation has more than one peak depending on the ratio of code rate to subcarrier frequency. In the process of acquisition/tracking, it is possible to acquire/track the wrong peak so that an error in range measurement occurs. This threat of tracking is called as ambiguity. For ambiguity, there are already several solutions in literature as reference[1][2][3][4]. In this paper, firstly we investigate ambiguity and explain how it affects the process of tracking. Then, three techniques that solve ambiguity which are BPSK-like, Sub Carrier Phase Cancellation, and Bump Jumping are considered. These methods are reviewed and their performance against the ambiguity is compared to original configuration. At last, a DSP/FPGA board is used to implement these techniques. A receiver module consisting of correlators, code/carrier generator, code/carrier discriminator, and state-machine is realized on the DSP/FPGA board. And, we set up a testing environment to examine and compare their performance of these methods.
2. Ambiguity
2.1 BOC modulated signal
In the document of Galileo OS SIS ICD(Open Service Signal In Space Interface Control Document)[5] that is just released on May 2006, the BOC(1,1) is used as modulation scheme for Galileo E1 Signal. Therefore, we take the BOC(1,1) for example.
The BOC modulated signal is represented as:
( )
( ) ( ) ( ) cos 2
s t = Pc t sc t π f tc
(1)
whereP is the signal power.
( )
c t is the Pseudo-Random Noise (PRN) code.
( )
sc t is the subcarrier of the BOC signal.
fc is the carrier frequency
1.56 1.565 1.57 1.575 1.58 1.585 1.59
x 109 -160
-155 -150 -145 -140 -135 -130 -125 -120
BOC Signal Sprectrum
Frequency
Power(dB)
Figure 1. BOC signal spectrum.
The subcarrier function sc(t) is represented as:
( ) (sin(2 ))
sc t =sign πfsct
(2)
where fscis subcarrier frequency. The BOC modulated signal spectrum is showed in Figure 1. There are two main lobes which separate subcarrier frequency from center frequency.2.2 ACF and Ambiguity
The ambiguity is resulted from the ACF (autocorrelation function) of BOC modulated signal. The ACF of code and BOC(1,1) signal is depicted in Figure 2.
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
-1 -0.5 0 0.5 1
1.5x 105 Autocorrelation of c(t)sc(t) and c(t)
Code Delay(Chip)
Autocorrelation
c(t)sc(t) c(t)
Figure 2. ACF of code and BOC(1,1) signal.
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2 -1
-0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8
1x 105 Discriminator output of c(t)sc(t) and c(t)
Code Delay(Chip)
Discriminator output
c(t)sc(t) c(t)
. Figure 3. Discriminator output of code and BOC(1,1) signal.
Because of nature of subcarrier, the ACF of BOC(1,1) signal has three peaks. When these two ACF apply to conventional early- minus-late envelope discriminator with early-to-late spacing of 0.5 chip period, the result is depicted in Figure 3. As shown in Figure 3, there are three zero-crossing points in discriminator output of BOC(1,1) signal. An early-minus-late tracker may track any of these zero-crossing points. If tracking-loop tracks on the zero-crossing points at +/- 0.5 code delay, an error in range measurement occurs. Then, it results wrong positioning. This phenomenon is called as ambiguity.
3. Unambiguous solutions
For ambiguity, three known techniques in reference[1] that solve the problem are BPSK-like, Sub Carrier Phase Cancellation, and Bump Jumping. The trick of BPSK-like and Sub Carrier Phase Cancellation is to make the ACF unambiguous.
And, Bump Jumping is to jump from wrong peak to correct peak if wrong tracking occurs. These techniques are described as following.
3.1 BPSK-like
From the spectrum of BOC signal, the power of signal is split into two main lobes. If only one of two lobes is used to be processed, the processing is just like BPSK modulation.
Therefore, the ACF becomes unambiguous. The overall structure of BPSK-like technique is depicted in Figure 4.The received signal is represented as:
( )
( ) ( ) (sin(2 )) cos 2
r t = P c tr −τ sign πfsct+φ πf tc +ϕ
(3)
where Pris receiving power,τ is code delay,φis phase of subcarrier, andϕ is phase of carrier.
C O S S IN
I& D
I& D
I& D
I& D
C ode generator
I& D
I& D
S ignal P rocessing
C ode N C O
C arrier N C O E arly P rom pt Late H ardw are
S oftw are
S ignal S prectrum
f c fc−fsc
( ) r t
Figure 4. Structure of BPSK-like technique
Taking the Fourier transform of (3) yields
( ) ( )
( )
( ) ( )
( )
( ) ( ) 2
1/ 2
j f j j
R f P C f er f fsc e f fsc e
j j
f fc e f fc e
π τ α δ φ δ φ
ϕ ϕ
δ δ
− ⊗ − − + −
⊗ − + + −
(4) In the BPSK-like scheme, the received signal mixes with a carrier with frequency ( fc−fsc) and phaseϕˆ. Because I&D (integrate&dump) behind can be regarded a lowpass filter, the result after mixer only contains the baseband term and is represented in frequency domain as:
( )
ˆ( ) ( ) ( )
ˆ
( 2 )
( ) 2
M f R f f fc fsc ej
j f
P C f er δ ϕ
α π τ φ ϕ ϕ
= ⊗ − −
− + + −
(5) The inverse Fourier transform of (5) gives
ˆ
( )
( ) ( )
2
m t =α P c tr −τ ejφ ϕ ϕ+ −
(6)
Next, m t( )mixes with three version code (Early, Prompt, and Late), and then integrate for a PRN code period. At the output of the correlator, the signal is:1 ˆ ( ˆ )
( ) ( ) ( )
2
( ˆ )
ˆ
( )
2
d
d p
t j
Y td Tp t T P c tr c t e dt
P Rr c ej
α τ τ φ ϕ ϕ
α τ τ φ ϕ ϕ
= − − + −
−
= − + −
∫
(7) where Rc( )τ is ACF of PRN code. The correlation function and discriminator output of BPSK-like are depicted in Figure 5 and Figure 6, respectively. There is only one peak in the correlation function in Figure 5. Hence, the target of tracking loop is only on the zero-crossing point at zero code delay as shown in Figure 6.
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Correlation function of BPSK-like method
Code Delay(Chip)
Correlation
Figure 5. Correlation function of BPSK-like technique
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3
0.4 Discriminator output of BPSK-like method
Code Delay(Chip)
Discriminator output
Figure 6. Discriminator output of BPSK-like technique
3.2 Sub Carrier Phase Cancellation
In noncoherent tracking technique, carrier component is cancelled by combining in-phase and quadrature-phase carrier.
As noncoherent tracking, the Sub Carrier Phase Cancellation technique makes the ACF unambiguous by combining in-phase and quadrature local subcarrier. The overall structure of Sub Carrier Phase Cancellation technique is depicted in Figure 7. At first, the received signal mixes with a carrier where frequency isfc. Then, it mixes with code multiplied in-phase subcarrier and code multiplied quadrature-phase subcarrier. We use equation (4) and derive equations in frequency domain.
( )
( ) ( )
( ) ( )
( )
( )
( ) ( ) ˆ
ˆ ˆ
ˆ ( ) 2
ˆ ˆ
2 ( ) ˆ 2 2
cos ( ) ( )
( ) ( ) ˆ
ˆ ˆ ( ) 2
MI f R f f fc ej
j f j j
C f e f fsc e f fsc e
j j f j f
P er C f e C f e
MQ f R f f fc ej
j f j
C f e f fsc e
δ ϕ
π τ α δ φ δ φ
ϕ ϕ π τ π τ
α φ φ
δ ϕ
π τ α δ φ δ
= ⊗ −
⎛ ⎞
− −
⊗ ⊗ ⎜⎝ − − + ⎟⎠
− − −
− − ⊗
= ⊗ −
⊗ − ⊗ − +
i
( )
( ) ( )
ˆ
ˆ ˆ
2 ( ) ˆ 2 2
sin ( ) ( )
f fsc e j
j j f j f
j P er C f e C f e
φ
ϕ ϕ π τ π τ
α φ φ
⎛ + − ⎞
⎜ ⎟
⎝ ⎠
− − −
− − i ⊗
(8) Taking inverse Fourier transform of (8) gives
( ) ( )
2 (ˆ ) ˆ ˆ
( ) cos ( ) ( )
2 (ˆ ) ˆ ˆ
( ) sin ( ) ( )
mI t P er j c t c t
mQ t j P er j c t c t
α ϕ ϕ φ φ τ τ
α ϕ ϕ φ φ τ τ
= − − − − −
= − − − − −
(9) At the outputs of correlators, the signals are
( ) ( )
( ) ( )
1 2 (ˆ ) ˆ ˆ
( ) cos ( ) ( )
2 (ˆ ) ˆ ˆ
cos ( )
1 2 (ˆ ) ˆ ˆ
( ) sin ( ) ( )
ˆ
2 ( ) ˆ ˆ
sin ( )
d
d p
d
d p
t j
YI dt P er c t c t dt
Tp t T
P er j Rc
t j
YQ dt j P er c t c t dt
Tp t T
j P er j Rc
α ϕ ϕ φ φ τ τ
α ϕ ϕ φ φ τ τ
α ϕ ϕ φ φ τ τ
α ϕ ϕ φ φ τ τ
= − − − − −
−
= − − − −
= − − − − −
−
= − − − −
∫
∫
(10) To square and root outputs of correlators, we make the correlation function unambiguous as equation (11).
2 2 2 (ˆ )
YI +YQ =α P Rr cτ τ−
(11)
EXP
I&D
I&D
I&D
I&D
Code x In phase Sub-carrier Generator
I&D
I&D
Signal Processing
Code NCO
Carrier NCO Early PromptLate
Hardware
Software
Code x Quadrature Sub-carrier Generator EarlyPrompt Late
Local code In phase sub-carrier Quadrature sub-carrier
( ) r t
Figure 7. Structure of Sub Carrier Phase Cancellation technique
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Correlation function of Sub Carrier Phase Cancellation method
Code Delay(Chip)
Correlation
Figure 8. Correlation function of Sub Carrier Phase Cancellation technique
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4
Discriminator output of Sub Carrier Phase Cancellation method
Code Delay(Chip)
Discriminator output
Figure 9. Discriminator output of Sub Carrier Phase Cancellation technique
The correlation function and discriminator output of the Sub Carrier Phase Cancellation technique are depicted in Figure 8 and Figure 9, respectively. Although there are five peaks in the correlation function, the discriminator output with enough wide spacing has only one zero-crossing point at zero code delay.
3.3 Bump Jumping
From the ACF of BOC signal (see Figure 10), there are three peaks that tracking loop may track on. If we find a way to distinguish the correct peak from the other two peaks, the ambiguity is solved. Beside the conventional three correlators (Early,Prompt,Late), the Bump Jumping technique use additional two correlators called as Very Early(VE) and Very Late(VL) at half subcarrier period from Prompt correlator. Then, these two correlators form Bump Jumping(BJ) discriminator function that uses equation (12).
DBJ =VE VL−
(12)
The outputs of typical discriminator and BJ discriminator are depicted in Figure 11. As showed in Figure 11, the BJ discriminator outputs are significant at the wrong peaks near +/- 0.5 code delay although typical discriminator outputs are zero.On the other hand, the BJ discriminator output is less at the correct peak. Therefore, the BJ discriminator can be used to distinguish whether the tracked peak is correct. Practically, we set up a threshold on the BJ discriminator output. Once the BJ discriminator output is more than the threshold in the process of tracking, the code generator decides to jump half subcarrier period forward or backward according to the sign of the output.
Overall structure of Bump Jumping technique is depicted in Figure 12.
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2 0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Autocorrelation function of Bump-Jumping method
Code Delay(Chip)
Autocorrelation
Figure 10. Correlation function of Bump Jumping technique
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
-1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8
1 Discriminator output of Bump-Jumping method
Code Delay(Chip)
Discriminator output
E-L VE-VL
Figure 11. Discriminator output of Bump Jumping technique
EXP
I&D
I&D
I&D
I&D
Code x Sub-carrier genernator
I&D
Signal Processing
Code NCO
Carrier NCO
Early Very Late
Hardware
Software
Very
Early Prompt
Late
Very Early
Early Late Promp
t
Very Late
( ) r t
Figure 12. Structure of Bump Jumping technique
4. Implementation
To implement these unambiguous solutions, we use a RF front-end and a DSP/FPGA board to realize a receiver. And, signal generator generates BOC signal and connects to receiver.
The DSP/FPGA board and signal generator are configured by computer. The overall testing environment is depicted in Figure 13.
Pre-amp Front-end FPGA DSP
DSP/FPGA Board Signal
Generator
RF Front-End Evalention Board Receiver
Figure 13. Testing environment
4.1 Signal Generator
The signal generator generates BOC(1,1) modulated signal.
The code refers to Galileo OS SIS ICD[5]. Only B component of E1 signal is generated. The carrier frequency of Galileo E1 signal is 1575.42 MHz just like GPS L1 signal. For testing, we don’t put data stream on the signal.
4.2 RF Front-end
The RF front-end is original designed for GPS receiver. The 1575.42 MHz L1 signal is down-converted and filtered by a 4 MHz bandwidth LC filter, then sampled with 2-bit A/D converter for subsequent digital processing. For BOC(1,1) modulation, the required minimal bandwidth is 4 MHz. So, the RF front-end is suitable. Finally, the RF front-end output 2-bit intermediate frequency signal which is sampled at 16.368 MHz and center frequency at 4.092 MHz.
4.3 DSP/FPGA Board
The DSP/FPGA board combined with its software tool allows quick and easy model-based design and implementation of signal processing applications relying on mixed DSP/FPGA-based hardware architectures. The 2-bit intermediate frequency data from RF front-end connects to the I/O port of FPGA. And, the rest components of receiver are separated to DSP and FPGA to realize.
4.3.1 FPGA
Components realized in FPGA part are front-end interface, DSP interface, carrier generator, code generator, and correlators(see Figure 14). The front-end interface receives 2-bit data from RF front-end and converts to meaningful value. The DSP interface receives control register from DSP such as carrier frequency and code rate. The DSP interface also transmits outputs of correlators to DSP. The carrier generator generates in- phase and quadrature-phase carrier which frequency is controlled by DSP. The code generator generates several versions of code which is modulated by subcarrier except BPSK-like technique.
The code rate and code phase shift are controlled by DSP. The signal from RF front-end firstly mixes with in-phase and quadrature–phase carrier and then mixes with different versions of code. At last, these signals are sent to correlators to integrate.
After integrating for a code period, the outputs of correlators will be sent to DSP and then dump to zero. According to different technique, the number of correlators varies.
Figure 14. FPGA part of receiver
Dump Vin
Valid In
xlusamp 16 Up Sample4
xlusamp 16 Up Sample3
xlusamp 16 Up Sample2
xlusamp 16 Up Sample1 xlusamp 16 Up Sample
xltdm 4
vin d1
d2
d3 vout
q d0
d1
T ime Division Multiplexer
xlslice[a:b]
Slice3 xlslice[a:b]
Slice2 xlslice[a:b]
Slice1
xlslice[a:b]
Slice
Early Prompt
Late Shift Register Scope3
Scope Rx_Q
Early Code
PromptCode
LateCode
Rx_I
Dump Early _I
Early _Q
Prompt_I
Prompt_Q
Late_I
Late_Q Rx Correlators
xlrelationala ba=b Relational3 xlrelationala ba=b Relational2 xlcastforce
Reinterpret2
xlregisterdz-1 enq Register2 xlregisterdz-1 en
q Register1 xlregisterdz-1 enq Register
32 RX PRN
Reg1 PRN & CodeDCO
Control REG 1
xlmult a b (ab)
xlmult a b (ab)
Log Viewer
CodeDcoIncr Dump CodeSlew
Code
L1B Generator
I Q Out IQ mux to make 32b stream3
I QOut IQ mux to make 32b stream2
I QOut IQ mux to make 32b stream1
I Q Out IQ mux to make 32b stream SGN
MAG IF
IF Scale
[Dump1]
Goto8 [Test]
Goto7
[LateCode]
Goto6 [PromptCode]
Goto5
[Dump]
Goto4
[EarlyCode]
Goto3
[CodeSlew]
Goto2 [SatSel]
Goto1 [CodeDcoIncr]
Goto Input
D1 Q1
D2 Q2
GPIO Gateway1
[Dump]
From9 [LateCode]
From8
[Dump]
From6
[PromptCode]
From5
[CodeSlew]
From3 [EarlyCode]
From2
[Dump]
From10
[CodeDcoIncr]
From1 MAG.mat
From File1 SGN.mat From File
[Dump]
From
xldsamp 64 Down Sample2
xldsamp 64 Down Sample1
xldsamp 64 Down Sample
Freq_in
Dump LO_sin
LO_cos Doppler Oscillator
bus0 Valid DSP Bus Reg0
DDS Freq Control REG 0
out Counter
xlconvertcast Convert1
8000 Constant2 65471 Constant13
65535 Constant1
-C- Constant
TCU PRN Out1
Combine TCU PRN (DSP) REG 1 2^23 CodeDCO Incr
Reg2 Code Slew REG 2 230 Code Slew
Board configuration Sy stem Generator
Interface from DSP
Interface from Front-End
Code generator Carrier generator
Correlators
Interface to DSP
4.3.2 DSP
Components realized in DSP part are FPGA interface, receiver state machine, code discriminator & loop filter, and carrier discriminator & loop filter (see Figure 15). FPGA interface receives outputs of correlators from FPGA part. FPGA interface also transmits control register such as carrier frequency, code rate, and code phase shift to FPGA. The receiver state machine arranges the process of receiver from acquisition to tracking. The receiver state machine diagram is depicted in Figure 16. The states are Acquisition, Confirm, Pull-in, and Tracking. In Acquisition state, code phase is slewed and carrier frequency is changed in order to find peak. Once signal power exceeds threshold, the signal is confirmed by M of N search detector in Confirm state. In the end of Confirm state, the initial code phase and carrier frequency are sent to Pull-in state. In Pull-in state, the code and carrier tracking loop are used to pull the code phase and carrier frequency to target value. Once average power and average phase error attain to regulated value, the state transfers to Tracking state. In Tracking state, code and carrier tracking loop are also running, but configuration of loop filter is different from Pull-in state. For Bump Jumping technique, the BJ discriminator is used to judge whether jumping is required in Tracking state. When the state is in Pull-in and Tracking, the code discriminator uses outputs of Early as well as Late correlator to calculate code delay and then is filtered by loop filter to get final code rate. The carrier discriminator uses the in- phase and quadrature-phase of Prompt correlator to calculate carrier phase and frequency error and then is filtered by loop filter to get final carrier frequency.
Figure 15. DSP part of receiver
Acquisition(Number = 1) 1.Slew code 2.Update carrier frequency
Confirm(Number=3~6) Accumulate M & N
N >= N_value
M >= M_value
Pull In(Number = 8) 1.Calculate average power and phase error 2.Accumulate count
(average power >
threshold_track) && (average phase error <
phase_error_track)
Tracking(Number =9 ~12) Judge whether jumping from BJ discriminator
power < threshold_acq True
False
True
True
False
True
True Start(Number = 0) Initialize parameter
False power >
threshold_acq False
False
Figure 16. Receiver state machine
5. Testing Results
We have implemented three techniques on the DSP/FPGA board. Some testing results are showed as following. Because of the jumping motion, we choose to show results of Bump Jumping technique in Figure 17 and 18. As seen in state transition, the state starts from Acquisition and ends in Tracking.
The jumping motion from wrong peak to correct peak occurs in the beginning of Tracking state. Doppler frequency is searched step by step in Acquisition state. Then, in Pull-in state it is pulled to target frequency quickly at first and swings little by little. At last, it settles down in Tracking state. Code rate is fixed in Acquisition state. Then, in Pull-in and Tracking state it swings across target rate. Moreover, a peak of code rate appears when jumping motion occurs. The output of Prompt in-phase correlator increases in Pull-in state. And, it changes sign when jumping motion occurs and gets bigger in Tracking state. The output of Prompt quadrature-phase correlator remains small because there is no data on the qradrature phase. Phase error of carrier swings across zero and settles down in Tracking state. Because we adopt the function atan(Q/I) to calculate phase, jumping motion doesn’t affect phase error.
The correlators output of the three techniques are shown in Figure 19,20,and 21. There are nine correlators which spacing is 1/8 chip period. The state in these Figures is from Pull-in to Tracking. The shapes of correlators in Tracking state are just like correlation function in Figure 5,8,10. Probability of detection and time from Pull-in to Tracking are shown in Figure 22 and 23.
Figure 17. State transition, Doppler frequency, and Code Rate
0 1 2 3 4 5 6
-2 -1 0 1
2x 104 Output of Prompt In-phase Correlator
Time(second)
Correlator Value
0 1 2 3 4 5 6
-2 -1 0 1
2x 104 Output of Prompt Quadrature-phase Correlator
Time(second)
Correlator Value
0 1 2 3 4 5 6
-2 -1 0 1
2 Phase Error of Carrier
Time(second)
Error Value(radian)
Figure 18. Outputs of Prompt correlator and phase error of carrier
0 ms_set
0 Track_On Test
Register 3 0
Sync Word
Switch1 Switch SignalWAVe
RTW Options 0
Pull_In 0 Power
31 PRN sqrt Math Function2
|u|2 Math Function1
|u|2 Math Function
[Pull_In]
Goto7 [Dump]
Goto6
[Prompt]
Goto5
[Carrier_freq]
Goto3 [Track_On]
Goto2 [Late]
Goto1 [Early]
Goto
50 Gain1
-K- Gain
[Carri er_freq]
From8 [Prompt]
From6 [Track_On]
From5 [Dump]
From4
[Pul l_In]
From3 [Late]
From2 [Early]
From1 In1
Sy nc_Word
Lev el
Early
Prompt
Late
index
FPGA Interface
FPGA Freq Register 0 FPGA PRN & CodeDCO Register 1
FPGA Code Slew Register 2 Dump
Data Phase DSP Bus
Rx
P_I
P_Q
Index Code_Slew
Freq State Code_Index Track_On Pull_In ms_set Controller1
0 Constant1
3073500 Constant
Re(u) Im(u) Complex to Real-Imag2 Re(u) Im(u) Complex to Real-Imag1 Re(u) Im(u) Complex to Real-Imag
TCU
PRN Out1
Combine TCU PRN (DSP) REG 1 2^23
CodeDCOIncr Early
Late Pull_In Track
Code_Err
Code Discriminator & Loop Filter
0 Code
Prompt Pull_In Iinitialincr Track
CarrierDCOIncr Out2 Out3 Out4 Out5 Carrier Discriminator & Loop Filter
Add2 Add1
Add
Interface from FPGA
Receiver State Machine
Code
Discriminator &
Loop Filter
Interface to FPGA Carrier
Discriminator &
Loop Filter
0 1 2 3 4 5 6
0 5 10 15
State Transition
Time(second)
State Number
0 1 2 3 4 5 6
4395 4400 4405 4410 4415
4420 Doppler Frequency
Time(second)
Frequency(Hz)
0 1 2 3 4 5 6
1023000 1023002 1023004
Code Rate
Time(second)
Rate(Hz)
Acquisition
Confirm
Pull-in Jump
Tracking
Figure 19. Correlators output of BPSK-like
Figure 20. Correlators output of Sub Carrier Phase Cancellation
Figure 21. Correlators output of Bump Jumping
20 25 30 35
30 40 50 60 70 80 90 100
Probability of Detection
S/N(dB) Pd(%)
BPSK SubCarrier BumpJumping
Figure 22. Probability of Detection
24 26 28 30 32 34 36
0 0.5 1 1.5 2 2.5 3 3.5
Time from Pull-in to Tracking
S/N(dB)
Time(s)
BPSK SubCarrier BumpJumping
Figure 23. Time from Pull-in to Tracking
Comparing the probability of detection and time from Pull-in to Tracking, it appears that Sub Carrier Phase Cancellation technique has better performance. However, as signal S/N becomes lower, the Sub Carrier Phase Cancellation technique requires more time to track because its shape of correlation is gentle. Probability of detection of BPSK-like decreases fast and require more time to track as S/N decreases. It is because that BPSK-like only uses one of two lobes. Bump Jumping requires less time to track than other techniques because its shape of correlation is sharp. As S/N is high, it is possible to track on wrong peak. So, it costs time to jump from wrong peak to correct peak. But, its probability of detection is medium as S/N is low.
6. Conclusion
In the paper, these different unambiguous tracking techniques for BOC signals are analyzed, implemented, and tested. When S/N is sufficiently high, the former two approaches, namely BPSK-like and Sub Carrier Phase Cancellation can be used to lead to satisfactory probability of detection and time from Pull-in to Tracking results. However, when S/N becomes low, the Bump Jumping technique appears to be advantageous.
Reference
1. V. Heiries, D. Roviras, L. Ries, V. Calmettes, “Analysis of Non Ambiguous BOC Signal Acquisition Performance,”
Proceedings of ION GNSS 2004, Sept. 2004, pp. 2611-26 22.
2. N. Martin, V.Leblond, G. Guillotel, V. Heiries, “BOC (x,y) signal acquisition techniques and performance,”
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