Design of PCS with two stage pipelining 64B/66B Encoder/Decoder
A Design of Power Management IC for CCD Image Sensor
Visible Light Wireless Communication Link Using LEDs
Relay Deployment Strategy for Minimizing Outage Probability of Downlink Cellular Systems
수학 영역(가형)
국토혁신을 위한 교통 인프라 구축계획 수립 연구 -
의값은 ?[2 점 ]① ln
수학 영역
Speed 정답체크 02Ⅰ. 삼각비 05Ⅱ. 원의 성질 23Ⅲ. 통계 46
A Study on Novel Step Up-Down DC/DC Chopper of Isolated Type with High Efficiency
Diversification of User Authentication by Writing Applet on Java Card
중학교 2학년 에이급수학 차례 및 정답
중학교 1학년 에이급수학 차례 및 정답
Characteristics of Random Jitter in Analog Fiber-Optic Links Employing a Mach-Zehnder Modulator and an EDFA
A Design of a High Performance Stream Processor without Superscalar Architecture
Analysis of Braking Response Time for Driving Take Based on Tri-axial Accelerometer
친환경 도로포장 기술과 정책
Sigma-Delta Modulator using a novel FDPA(Feedback Delay Path Addition) Technique
김진국*·권양수**·곽효경***
Development of Core Technologies for Implantable Active Devices
Jitter Reduction by Modulator-Bias Control in Analog Fiber-Optic Links Employing a Mach-Zehnder Modulator Followed by an Erbium-Doped Fiber Amplifier
Design of High Performance Dual Channel Pipelined Interpolators for H.264 Decoder
Hand-effect compensation circuit design using the low-voltage MEMS switch in the handset
