A Novel Negative-Output High Step-up Ratio DC-DC Converter Based on Switched-Inductor Cell

(1)

A Novel Negative-Output High Step-up Ratio DC-DC Converter Based on Switched-Inductor Cell

Ho-Yeon Kim

^*

, Eun-A Moon

^*

, Minh-Khai Nguyen

^**^★

Abstract

A high boost dc-dc converter based on the switched-inductor cell (SL-cell) is suggested in this paper. The suggested converter can provide a high voltage gain that is more than 6. Moreover, the voltage gain can be easily increased by extending a SL cell or a modular voltage boost stage. This paper shows the key waveforms, the operating principles at the continuous conduction mode (CCM), and a comparison between the suggested converter and the other non-isolated converters. In addition, the extension of the suggested converter is presented. The simulation results were shown to reconfirm the theoretical analysis.

Key words：non-isolated dc-dc converter; high-voltage gain; switched-inductor; boost converter; continuous conduction mode

* Graduate School, Chosun University, Gwangju, Korea

** Dept. of Electrical and Electronics Engineering, Ho Chi Minh City University of Technology and Education, Ho Chi Minh City, Viet Nam

★ Corresponding author

E-mail：[email protected], Tel：+84-8-3896 1333

Manuscript received Feb. 24, 2019; revised Mar. 7, 2019; accepted Mar. 28, 2019.

This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

I. Introduction

Nowadays, we are facing pressure from environment protection and global surface temperature. The energy sources are depleting, hence the development of renewable energy is the most-effective solution.

However, the available renewable energies such as wind power, solar cells, and fuel cells are dependent on the weather conditions, and their output voltages are low and instability. Thus, a high boost voltage conversion should be used to convert a low voltage to a high voltage for grid-connected inverter. The functional block diagram of the power-conversion system is shown in Fig. 1. A high boost dc-dc converter is used to convert a low voltage into a high voltage dc bus [1].

DC-DC Converter Low Voltage

Side

High Voltage Side Fig. 1. Functional diagram of power-conversion system.

Many high boost dc-dc converters have been researched and obtained a high-voltage gain in both isolated and non-isolated topologies. For the isolated topologies [2][3], a high-frequency transformer is used to isolate the input and the output with a two-stage dc-ac-dc power conversion. The converter circuit’s size and cost are increased. Moreover, the leakage inductances can be caused a voltage spike on switches. Owing to these limitations, the transformer-based topologies cannot achieve a high efficiency as non-isolated topologies. For the non-isolated topologies, many high boost dc-dc converters have been proposed in [4-15].

273

(2)

S

2

C

1

C

₀

V

_i

S

1

D

1

D

0

R L

2

L

1

(a)

S

2

C

₁

C

0

V

i

L

S

₁

D

₁

D

₂

D

₀

R L

1

(b)

Fig. 2. Voltage-lift technique based non- isolated dc-dc converter in (a) [14] and (b) [15].

The high boost converters with coupled-inductor are proposed in [4][5] can obtain the high voltage gain; however, the leakage inductance of the coupled inductor causes high voltage spike on switches. The non-coupled-inductor converters can achieve a high-voltage gain with a high efficiency because of lacking the leakage inductance. Different structure and techniques including cascaded [6], switched-inductor [7], switched-capacitor [8], interleaved [9][10], and voltage-lift [11-15] techniques have been introduced. In switched-capacitor technique [8], by combining several switches and capacitors with minimum inductor achieving a higher output voltage can be obtained. However, this technique uses a large of number of switches and capacitors, which increase the current stress of switching. In [12], series and parallel combinations of converters have been verified to improve the voltage gain of the converter. However, they can increase size, cost, and complexity of control.

Thus, it was not very interesting to researchers.

Moreover, the voltage lift techniques based on inductor and capacitor elements was proposed in [13][14] to decrease the voltage stress of switch, as shown in Fig. 2. The voltage lift technique can use for the applications with high efficiency, simple structure, and cheapness when compared with other techniques. In addition, the lack of additional switches that lead to the complexity of the control system of a dc–dc converter is an important feature of this technique. The non- isolated dc–dc boost converters using the voltage technique has been presented in [15] with the higher voltage gain. In this topology, the output voltage of the proposed converter is negative with respect to input ground. However, the voltage gain is not high.

This paper presents a dc-dc converter based on switched-inductor technique with high-boost conversion ratio. The following characteristics of the proposed converter are: easy to increase the voltage gain, high-boost voltage gain, and using the small duty cycle. The content of the paper is

organized as follows. In Section II, the suggested topology is presented along with the circuit operation principle and steady-state analysis in continuous conduction mode (CCM). Some comparisons with other converters are shown in Section III.

The design procedure along with the simulation results in PLECs software is given in Section IV.

Finally, some conclusions are discussed on Section V.

Ⅱ. Proposed Converter

Fig. 3 shows the suggested dc-dc converter. It consists of one SL cell (L

a

, L

b

, D

a

, D

b

, and D

c

), two power switches (S

₁

-S

₂

), modular voltage boost stage (L

1

, D

1

, D

2

, and C

1

), one diode (D

0

), one capacitors (C

o

), and a resistive load (R). Fig.

4 shows the key waveforms of the suggested

converter operating in the CCM. The operation

of switches is controlled by the PWM technique

and opposes each other. The switches, S

₁

and S

₂

,

are turned on and off alternately. To simplify the

circuit analyses of the suggested converter in the

CCM, the following assumptions were made: 1) all

devices are ideal and lossless; 2) the capacitance

(3)

of the capacitors is large enough to maintain the constant capacitor voltage; and 3) the current flow to the inductor increases or decreases linearly.

La S2

D_a C1

C0

V_i

D_c Lb

S1

Db

D1

D2

D0

R L₁

SL cell MV-Boost Stage

Fig. 3. Proposed dc-dc converter.

S1

S2

T

t t

t ILa=ILb

∆ILa Ton

t IL1

∆IL

Toff

Fig. 4. Key waveforms of the suggested converter.

La S₂

D_a C1

C₀ V_i

D_c Lb

S1

Db

D1

D2

D0

R L₁

La S2

Da C₁

C0

Vi

Dc

Lb

S1

Db

D₁ D₂

D0

R L1

(a)

(b)

Fig. 5. Operating modes of the suggested converter:

(a) state 1 and (b) state 2.

A. Converter Analysis in CCM

Fig. 4 shows the key waveforms of the suggested converter in the CCM. Fig. 5 shows the operating state of the suggested converter.

State 1-[0 ≤ t ≤ DT, Fig. 5(a)]: S

1

is turned

“ON”. The L

a

and L

b

inductors are charged. The D

_a

, D

_c

diodes are forward-biased, while the D

_b

diode is reverse-biased. The D

0

diode is forward-biased and D

1

is reverse-biased. The time interval in this mode is T

_on

= DT, where D and T are the duty cycle of switch S

1

and the switching period, respectively.

1

1 1

.

La Lb

a b i

L

C o

di di

L L V

dt dt

L di V V

dt

ì = =

ïï í

ï = -

ïî

(1)

State 2-[ DT < t ≤ T, Fig. 5(b)]: S

1

is switched “OFF” and S

2

is switched “ON”; the D

0

diode is reverse-biased while the D

1

diode is forward-biased. The time interval in this mode is T

off

= (1-D)ㆍT. During this mode, the L

a

and L

b

inductors are discharged, while the L

1

capacitor is charged. The following formulas are derived as

1

1 1 1

.

La Lb

a b i C

L C

di di

L L V V

dt dt

L di V dt

ì + = -

ïï í

ï =

ïî

(2)

Through the application of the volt-second balance law to the inductors L

a

, L

b

, and L

1

in a steady state, (1) to (2) yield the following equations:

( ) ( )

( )

( ) ( )

1 _off

_off

1 1

1 0

1 0,

i i C Lb

i Lb

C o C

DV D V V V

DV D V

D V V D V

ì + - - - =

ïï + - =

í ï - + - =

ïî

(3)

By substituting (3) into (1), the capacitor C

₁

voltage and output voltage of the suggested converter are as follows:

( )

1

1 1

1 ,

1

C i

o i

V DV

D

V D V

D D

ì = +

ï -

ïí +

ï = ïî -

(4)

B. Extension of the Suggested Converter

According to Fig. 6, the suggested converter

(4)

is possible to verify an n-stage boost converter by adding the modular voltage boost stage (one inductor, one capacitor and two diodes). The voltage gain with n from 1 to 4 is shown in Fig.

7. The extension with n-stage boost structure, the SL-cell and two switches are kept in the power circuit, and (n + 1) inductors, (n + 1) capacitors, and (2n + 1) diodes are used for modular voltage boost stage.

La S2

Da C1

C0

Vi

Dc

Lb

S1

Db

D1

D2

D0

R L1

SL cell Stage 1 Cn

Dn

Dn+1

Ln

Stage n

Fig. 6. Suggested converter with n-stages.

Fig. 7. Voltage gain comparison.

For analysis, S

₁

is ON and S

₂

is OFF, D

₀

is conducted, and D

1

, D

2

, …, D

n

are Off. Moreover, L

2

, L

3

, …, L

n+1

and C

1

, C

2

, …, C

n

are in series connection. The series connection of n-capacitors increases V

o

. When S

1

is OFF and S

2

is OFF, and D

1

, D

2

, …, D

n

are directly biased and D

0

is reversely biased. The voltage gain of the n-stage converter in CCM is given

( )

( ¹ ¹ )

o i

n D

V V

D D

= +

- (5)

Ⅲ. Comparison with Other Non-Isolated High-Boost Converters

The comparison between the suggested converter and other non-isolated high-boost dc-dc converters is shown in Table 1. When compared with the non-isolated dc-dc converters in [13]-[15], the suggested converter uses one more inductor and diodes. Moreover, the suggested converter has less one switch and one capacitor than the non-isolated converter in [14]. Although, the suggested converter uses more components, the suggested converter can save the size of the inductor in SL cell and has higher voltage gain.

Fig. 8 shows a comparison between the voltage gains of the non-isolated high boost dc-dc converters in the CCM. As shown in Fig. 8, the voltage gain of the proposed converter is the highest at the same duty cycle.

Table 1. Comparison between the suggested converter and other high boost dc-dc converters.

Switch Inductor Capacitor Diode Voltage gain Converter

in [13] 2 2 2 2

D

(

1¹-D

)

Converter

in [14] 3 1 3 2 ( )

1 2

1 D D D D - +

-

Converter

in [15] 2 2 2 3

D

(

1¹-D

)

Suggested

converter 2 3 2 6

¹

(

1

)

D

D D

+ -

Fig. 8. Operating modes of the suggested converter: (a)

state 1 and (b) state 2.

(5)

Ⅳ. Simulation Verification

To confirm properties and the presented analysis of the proposed converter, the simulation results based on PLECS software were presented. Table 2 indicates a list of parameters of the proposed converter used in the simulation.

Fig. 9 presents the simulation results of the proposed converter with D = 0.5 and V

i

= 20 V.

As shown in Fig. 9(a), the capacitor C

1

voltage and the capacitor C

0

voltage was boosted to 60 V and 120 V, respectively. The output voltage is 120 V. The average inductors current, I

La

and I

Lb

is 6.7 A and with peak-peak ripple of 0.7 A, while the average inductor current, I

L1

is 3.3 A with peak-peak ripple of 1 A as shown in Figs.

9(a) and 9(c). The voltage stress across active switches, S

1

and S

2

is 60 V and 120V, respectively.

Fig. 10 shows the simulation results with D = 0.814 and V

i

= 10V. As shown in Fig. 10(a), the capacitor C

1

voltage and the capacitor C

0

voltage was boosted to 97 V and 120 V, respectively.

The output voltage is 120 V. The average inductor current, (I

La

= I

Lb

) is 7.89 A and with a peak-peak ripple of 0.82 A, while the average inductor current, I

L1

is 1.47 A and with peak-peak ripple of 0.92 A as shown in Figs. 10(a) and 10(c). The voltage stresses across active switches, S

1

and S

2

are 97 V and 120V, respectively.

Table 2. List of parameters

Parameter Value

Input/out voltage 20 V/120V

Output power 200W

Capacitor C

₁

330 µF

Capacitor C

0

220 µF

Inductor ( L

a

= L

b

) 1000 µH

L

1

2000 µH

Resistor load 72 Ω

Switching Frequency 10 kHz

Fig. 9. Simulation waveforms when V

i

= 20 V. From top

to bottom: (a) input voltage, inductor L

_a

current,

capacitor C

1

voltage, output voltage; (b) inductor

current, D

a

, D

b

and D

c

voltages; and (c) S

1

, S

2

,

D

1

, and D

0

voltages.

(6)

Fig. 10. Simulation waveforms when V

i

= 10 V. From top to bottom: (a) input voltage, inductor L

a

current, C

1

capacitor voltage, output voltage; (b) inductors current, D

a

, D

b

and D

c

voltages; and (c) S

1

, S

2

, D

1

, and D

0

voltages

Ⅴ. Conclusions

The novel high gain dc-dc boost converter based on the switched-inductor cell was suggested in this paper. The suggested converter features were presented by its development for n-stage with a modular voltage boost circuit; it can improve the voltage gain and efficiency. The structure of suggested converter was compared in CCM with other conventional non-isolated boost converters from the standpoint of number of switches, inductors, capacitors and diodes, and voltage gain. For same operating condition, it was shown that the suggested converter improves the voltage gain. The simulation results from PLECS Software match those obtained from the theoretical analysis.

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