CoolSiC TM SiC MOSFET
Technology, Device and Application
Kwokwai Ma
Infineon Technologies Hong Kong Ltd
Revolution to rely on.
Copyright © Infineon Technologies AG 2016. All rights reserved.
Abstract
l Silicon Carbide (SiC) had excellent material properties as the base material for next generation of power semiconductor. In developing SiC MOSFET, gate oxide reliability issues had to be first overcome before commercial application. Besides, a high and stable gate-source voltage threshold V
GS(th)is also an important parameter for operation robustness. SiC MOSFET with such characteristics can directly use existing high-speed IGBT gate driver IC's.
l The linear voltage drop characteristics of SiC MOSFET will bring lower conduction loss averaged over full AC cycle compared to similarly rate IGBT.
Lower switching loss enable higher switching frequency. Using package with auxiliary source terminal for gate driving will further reduce switching losses. Dynamic characteristics can fully controlled by simple gate resistors.
l The low switching losses characteristics of SiC MOSFET can substantially reduce power losses in high switching frequency operation. Significant power loss reduction is also possible even at low switching frequency and low switching speed. in T-type 3-level topology, SiC MOSFET solution enable three times higher switching freqeuncy at same efficiency.
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Topics
l Technology
l Device characteristics l Application
l Product
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Silicon-Carbide
Benefits from material properties
Benefits
l Higher blocking voltage and better Ron
l Unipolar operation possible even for high voltage à reduced power loss and better efficiency l Faster switching at higher voltages
à leaner system design l Higher radiation robustness
physical properties 4H-SiC Si GaN
band gap [eV] 3.26 1.12 3.2
break through field [MV/cm] 2 0.25 ~2
thermal conductivity [W/cm/K] ~3.4 1.5 1.3 ideal bulk mobility [cm²/V/s] 800/115 1400/450 440/2DEG/- electron saturation vel. [cm/s] 2e7 1e7 2.2e7
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SiC- vs Si-power semiconductor devices
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l Lower switching losses with unipolar operation
CoolSiC™ MOSFET
SiC benefits and target applications
… the ongoing major trend in designs is the increase of power density based on a reduction of switching losses, enabling smaller heatsinks, and also allowing higher operating frequencies, enabling smaller magnetics.
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SiC MOSFET Technology background
Basic challenge of planar SiC MOSFETs
l Defect density on the planar SiC – SiO 2 interface is very high in 4H-SiC
o Scattering of electrons in MOSFET channelà Reduction of electron channel mobility (µ e,ch )
à Reduced performance: channel resistance Ý. power losses Ý, channel current ß
e- e- e-
e- e-
e- e-
e- e-
e- e-
e- e- e- e-
e- e-
e- e- e- e-
e- e-
2 nm SiO
24H- SiC
RK
1
RK2 Rn+
Rn+ RKanal
Metal
SiC (p-doped) SiC (n-doped) Silicon dioxide +V
G+V
DSHRTEM-image of the SiC/SiO
2– interface.
Only solution : Apply high field across the
oxide for turn on - by higher V
GSor thinner oxide
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Infineon solution to SiC MOSFET
- Trench-based structure Trench-MOS devices
lNo need to overdrive the gate oxide in forward mode
lNeed design measures to reduce electric field in blocking mode
Oxide stress in blocking mode due to the high internal field in SiC
Less critical because
- E-field reduction by design measures possible
- Full blocking voltage is applied only in exceptional cases during operation Oxide stress in forward mode due to
the need to compensate for the high channel defect density
Very critical because
lIn each on state the full stress is applied lNo possibility to use design measures
TMOS
n
-p
eeDMOS
n
-e e e e
Daniel Heer, Damiel Domes, Dethard Peters, "Switching Performance of a 1200V SiC-Trench MOSFET in a low-power module", PCIM Europe, 2016 Copyright © Infineon Technologies AG 2016. All rights reserved.
CoolSiC TM SiC MOSFET
Achieve safe oxide operation with low R on x A together
l SiC Trench-MOSFET: lowest Ron*A
l Restricted maximum operating electric field in gate oxide is key for assuring lowest failure rate in MOS-based devices
CoolSiC
TMtrade-off curve for oxide stress in reverse mode
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SiC MOSFET gate oxide reliability verification
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Reference:Menia Beier-Moebius, Josef Lutz, "Breakdown of Gate Oxide of 1.2 kV SiC-MOSFETs Under High Temperature and High Gate voltage", PCIM Europe, 2016
Definition of SiC MOS gate oxide
intrinsic and extrinsic failure Gate test voltage profile
Key characteristics of CoolSiC TM MOSFET
l R
DS,on*A=3mΩcm² (typical)
l R
DS,on=45mΩ @T
vj=25°C
l Increase by 50% @ 150°C l V
GS,th=4V (typical) @I
D=1mA, V
DS=V
GSl V
F=3.5V (typical) @I
D=10A, V
GS=-5V l Gate control window: 15V/-5V
l Gate charge: 45nC
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Unique for SiC MOSFETs
Topics
l Technology
l Device characteristics l Application
l Products
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CoolSiC TM SiC MOSFET gate threshold V GS(TH)
- Voltage range and temperature-dependencies
I
D= 10 mA V
DS=V
GSCopyright © Infineon Technologies AG 2016. All rights reserved.
栅极阈值电压VGS(th) (V)
结温:T
j(°C)
Gate-source threshold voltage I
D= 10mA, V
DS= V
GST
j= 25°C 3.5 4.5 5.5
T
j=175°C - 3.6 -
V
GS(th)V
(tested after I
GSS+15V XXX m s as precondition pulse)
l High V GS(TH) provides high noise immunity ruggedness against switching transients
150 mil slim body package 1EDI20N12AF (2A) 1EDI60N12AF (6A)
CoolSiC TM SiC MOSFET Gate Driver IC
- 1EDI Compact Family
l CoolSiC TM SiC MOSFET gate characteristics compatible with IGBT gate drive windows : R DS(ON) specified at V GS = +15V
l High-speed IGBT gate driver can thus be used for CoolSiC TM SiC MOSFET l Coreless transformer designed for highest dv/dt – CMTI 100kV/µs l Short propagation delay (125 ns) and filter time for up to 4MHz switching
(D=0.5)
GND1 IN+
IN- VCC1
OUT+
VCC2
GND2 OUT-
+3V3
SGND IN
+15V
2R2 100n 4µ7
3R3
4µ7
-5V 0V
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300 mil wide body package
1EDI20H12AH (2A) 1EDI60H12AH (6A)
CoolSiC™ MOSFET loss characteristics
Benchmark in switching losses Threshold-free ON-state characteristic
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0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0
0 1 2 3 4 5 6 7 8 9 10
On-State Current ID/ICinA
On-State Voltage VDS/VCEin V
Output Characteristic
Conduction losses comparison
- 1200V CoolSiC™ MOSFET vs H3 IGBT & 1000V/30A Si MOS
SiC TMOS
IMW120R45T1 TO247
H3 IGBT
IKW40N120H3 TO247
actual Irms
Comparison to a 1200V IGBT
l Resistive output characteristic for SiC TMOS versus, the diode-like voltage drop Vcesat of IGBT (typically1V~2V) increase logarithmically with current.
l Lower conduction losses below the rated current (25A at 175°C)
l For component selection, lower current derating applied for SiC MOSFET compared to Si IGBT due to low switching losses
Si MOS 1000V 30A
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Switching Losses: E on and E off
Comparison with a H3 IGBT
(same SiC SBD used for commutation!) o Temperature dependency of
MOSFET relatively small oE off drastically lower – Factor 5 at low temperature – Factor 10 at high temperature
(due to bipolar nature of IGBTs) oE on around 25-50% lower when commutating against the same SBD
Temperature dependency
Note: Commutation against the same SiC SBD
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TO247-4pin: Extra driver source pin enable further switching loss reduction
CoolSiC™ MOSFET 45 mW – 4pin
CoolSiC™ MOSFET 45 mW – 3pin
Tj=175°C, Vds=800V, Rg=4.5 Ohm, Vgs=-5/+15V, FWD=SiC 20A
Eoff -10%
Eon -40%
l The right package is key to a full utilization of SiC benefits
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Switching characteristics
l Switching characteristics are controllable by R G,ext (4.5Ω and 10.2Ω in the examples)
turn-on 20 A / 800V turn-off
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Dynamic characteristics E sw vs Rg
- Very good controllability with Rg
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Dynamic characteristics dv/dt vs Rg
- Very good controllability by Rg
dv/dt is fully controllable by R G
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Summary
Features and key benefits
Unique SiC MOSFET characteristics vs traditional 1200 V silicon devices l Low Q
gand device capacitances
l Almost no reverse recovery losses of body diode
l Temperature independent switching losses l Knee-voltage free on-state characteristic compared to IGBT
CoolSiC
TMunique SiC MOSFET advantage
l Superior gate oxide reliability
l Best-in-class switching and conduction losses l Higher transconductance gm (gain)
à simple gate drive
l High threshold voltage V
th=4 V
l Application-oriented short-circuit robustness l IGBT compatible gate driving: +15/-5 V
Key Benefits
l Best in class system performance l Highest efficiency for reduced
cooling effort
l Higher frequency operation l Reduction in system cost l Increased power density l Reduced system complexity l Longer lifetime and higher
reliability
l Ease of design and implementation
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Topics
l Technology
l Device characteristics l Application
l Product
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Switching loss reduction possibility
› Hybrid solution – Recovery loss
reduction – Eon reduction
› Full SiC solution – Recovery loss
reduction – Eon reduction – No tail current – Reduced on state
losses
Switching loss reduction by 80% possible with fast switching SiC MOSFET
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Loss reduction possible even with slow switching speed
l Hybrid solution – Recovery loss
reduction – Eon reduction
l Full SiC solution – Recovery loss
reduction – Eon reduction – No tail current – Reduced ON-state
losses
50% loss reduction feasible even with IGBT-like slow dv/dt (<5kV/µs) operating at 5 kHz
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H3 + Rapid 1 TMOS + Rapid 1 TMOS + Gen 5
C ir cu it
1200V
Switch
1200V 40A H3 IGBT
IKW40N120H3 1200V 45mΩ SiC TMOS
IMW120R045T1 1200V 45mΩ SiC TMOS IMW120R045T1
650V
Switch
650V 30A S5 IGBT
IKW30N65ES5 650V 30A S5 IGBT
IKW30N65ES5 650V 30A S5 IGBT
IKW30N65ES5
650V
Diode
650V 30A Rapid1 Diode
co-packed w/ IKW30N65ES5 650V 30A Rapid1 Diode
co-packed w/ IKW30N65ES5 650V 16A Gen5 SBD IDH16G65C5
fsw
24kHz 24kHz
48kHz 72kHz
24kHz 48kHz 72kHz
Performance comparison in NPC2 (3-level T-Type topology
Conditions
IKW40N120H3
IKW30N65ES5
IMW120R045T1
IKW30N65ES5
IMW120R045T1
30A S5 IGBT 16A Gen5 SBD
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IMW120R045T1/IKW40N120H3 w/ IKW30N65ES5(+IDH16G65C5): VIN=700V-740V, VOUT=230V, VGS=-5/15V, RG=2.2Ω; T-NPC application test, Villach (K. Sobe)
Performance in a 3L T-Type Topology
All solutions at 24kHz
› Drastically higher efficiency with SiC based solutions (at 4 kW output power) – 0.5% with TMOS+S5+Rapid1 – 0.7% with TMOS+S5+Gen5
› Drastically higher output power with SiC based solutions (for T
max=100°C) – 1.0 kW with TMOS+S5+Rapid1 – 1.5 kW with TMOS+S5+Gen5
H3+Rapid1
TMOS+Gen5 TMOS+Rapid1
Replacing the outer 1200V H3 IGBT with a 1200V SiC TMOS results in drastically higher efficiency and output power!
!
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Performance in a 3L T-Type Topology
SiC@48kHz vs. Si@24kHz
› SiC-based solutions enable to go to higher frequencies compared to a pure IGBT solution
– TMOS+S5+Rapid1@48kHz gives a similar efficiency as the pure IGBT solution at 24kHz!
– TMOS+S5+Gen5@48kHz gives a 0.4-0.5% better efficiency then the pure IGBT solution at 24kHz
H3+Rapid1
@24kHz
TMOS+Gen5
@48kHz
TMOS+Rapid1
@48kHz
IMW120R045T1/IKW40N120H3 w/ IKW30N65ES5(+IDH16G65C5): VIN=700V-740V, VOUT=230V, VGS=-5/15V, RG=2.2Ω; T-NPC application test, Villach (K. Sobe) Replacing the outer 1200V H3 IGBT with a 1200V SiC TMOS allows to double the switching frequency without giving up on efficiency!
!
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Performance in a 3L T-Type Topology
SiC@72kHz vs. Si@24kHz
› SiC-based solutions are still
competitive at 72kHz, especially with SBDs in the NPC path
› TMOS+S5+Gen5 @72kHz still gives a better efficiency (~0.2%) than the pure IGBT solution at 24kHz
H3+Rapid1
@24kHz TMOS+Gen5
@72kHz
TMOS+Rapid1
@72kHz
IMW120R045T1/IKW40N120H3 w/ IKW30N65ES5(+IDH16G65C5): VIN=700V-740V, VOUT=230V, VGS=-5/15V, RG=2.2Ω; T-NPC application test, Villach (K. Sobe) Using a 1200V SiC TMOS as outer switch and Gen5 SBDs in the NPC path allows to triple the switching frequency and gives a better eff.
!
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Conclusion
With latest CoolSiC
TMSiC MOSFET technology
lSiC MOSFET gate-oxide reliability problem overcome by trench-gate structure lSiC MOSFET with IGBT-compatible gate characteristics offer operational robustness
lThreshold-free conduction loss
lAuxiliary source pin for gate drive further reduce switching losses lDynamic characteristics fully-controllable by Rg
lSignificant loss reduction possible even at low switching frequency of 5kHz lSiC MOS @72kHz still gives better efficiency than pure IGBT solution at 24kHz in NPC-2 topologies
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Topics
l Technology
l Device characteristics l Application
l Product
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CoolSiC™ MOSFET First products
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Demo and reference design
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Standard BUCK or Boost
demo kit 20KW B6 High frequency Bi-directional inverter reference design
12pcs IMZ120R041M1
Product information
› Special webpage for CoolSiC™ MOSFET – www.infineon.com/coolsic
› Product brief CoolSiC™ MOSFET – lead product promotion
› CoolSiC™ Brochure
– SiC… MOSFET, Driver, Diode
› Different publications
– The future of power semiconductors – CoolSiC MOSFET revolution to rely on – Various conference papers
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Upcoming information and material
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CoolSIC™
MOSFET overall
Evaluation Board Discrete
TO-247
Evaluation Board Module Easy1B FF11
Application Notes and Evaluation Boards
Gate drivers for SiC MOSFETs
› Documentation material and Boards available for PCIM Shanghai
Infineon‘s SiC-MOSFET status: we are going to combine safe oxide operation with low R on x A
IFX trade off for oxide stress in reverse mode
l IFX SiC-Trench-MOSFET: lowest R on *A PLUS lowest oxide field in on state l Restricted maximum operating field for the oxide is key for assuring lowest
FIT rates in MOS based devices è use of thick oxides !!
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Revolution to rely on.
Copyright © Infineon Technologies AG 2016. All rights reserved.