Chapt. 18 - Lec 22-1
Chapter 18. Non-ideal MOS
• So far, we have discussed MOS characteristics making some assumptions - calling it “ideal”.
– Assumed that the M = S , i.e. the bands are flat when no voltage is applied.
– Assumed that the oxide and oxide-semiconductor interface are free of charges.
• These assumptions do not hold good in an actual MOS device, and we have to consider the deviations from the ideal case.
• For the purpose of discussions, we call these as “real”.
M-S work function difference - ideal
When M = S , the Fermi level is aligned before we make the device. So, when the MOS structure is made, the band remains flat when the applied VG is zero.
M = S
EFS EFM
O
M S
M
S
Flat band condition (ϕS = 0)
Chapt. 18 - Lec 22-3
M-S work function difference - real
M depends on the metal.
Example: M (Al) 4.2 eV, M (Au) 5.1 eV
S depends on the semiconductor doping.
S = + (EC – EF)FB
So, M S
in a “real” device.
So, actual band alignment before
making the MOS-C structure looks as shown for Al-SiO2-Si (p-type)
EFS EFM
O
M S
M
S
M = Al
Si = 4.03 eV
Band diagram for
M
SEFS EFM
O
M S
M
S
M = Al
Therefore, we have to apply a gate voltage ( ϕMS = MS/q) to get flat-band condition (ϕS = 0) in real MOS.
EFS S
EFM
O M
M S
MS
MS q q
1
ϕS ≠ 0
Chapt. 18 - Lec 22-5
C-V curve for
M
S
M S
MS
MS q q
1
In real MOS, the C-V curve is shifted by ϕMS volts along the voltage axis relative to the ideal MOS.
G MS FB
V
SV
0
If there is no charge centers in oxide in real MOS, the flat band voltage (VFB) is
Similarly, the gate voltage shift between C-V curves of the ideal (VG’) and real (VG) MOS is
same MS G
G G
S
V V
V
(
')
ideal for
0
) '
VFB
cf
Polysilicon-gate MOS
Modern day devices generally use heavily-doped polysilicon as the gate material.
For p+-polysilicon gate, EFM can be assumed to be at EV. For n+-polysilicon gate, EFM can be assumed to be at EC. Question: If the substrate is intrinsic silicon, and the gate
material is p+-polysilicon, calculate MS. MS = Eg / 2 = 0.55 eV
Question: If the substrate is n+-silicon, and the gate material is p+-polysilicon, calculate MS.
MS = + 1.1 eV
What is the voltage that has to be applied to the gate to get flat-band condition?
VG = 0.55 eV/q = 0.55 V
Chapt. 18 - Lec 22-7
Interface and oxide charges
For the “ideal” device, we have assumed that the oxide and the interface is devoid of any excess charges.
This is not true in practice.
QM : Na+, K+ and so
QF : ionized Si waiting to be oxidized SiOx (x < 2)
QIT : interface traps (also called
interface states) due to dangling bonds at the Si surface
QIT QF QM
For simplicity, let’s assume that all these charges are situated close to the interface on the oxide side (even though they
aren’t) and their concentration is Qi (Coulombs/cm2).
Qi = net interface charges in C/cm2
Effect of interface charges, Q
i(C/cm
2)
The interface charge Qi in the oxide (assumed positive) will
induce some negative charges (Qi /cm2) in the semiconductor
Voltage to be applied to the gate to get flat-band condition
o i
C
Q
Qi is usually positive (but can be both positive or negative in general).
To get “flat-band” condition, we have to apply a negative voltage to the gate.
The effect is as though we have applied a positive gate voltage to the gate, and the negative charges in the
semiconductor causes band bending.
ox ox ox
ox G
ox
o x
K x
A C C
where 0
Chapt. 18 - Lec 22-9
Effects of work function difference and interface charges
If we consider the effects of work function difference and the interface charges, the silicon band diagram may not be “flat”
even when no voltage is applied to the gate.
o i G MS
FB C
Q V q
V S
1
0 voltage to be applied to the gate to get flat band condition.
=
FB T
T V V
V where VT is the threshold voltage assuming ideal conditions (using equation 17.1 in text).
Hence, a correction has to be applied to the threshold voltage calculations carried out earlier assuming “ideal” MOS
conditions.
Flat band voltage (VFB)
Effects of
MSand Q
ion C
G-V
Gcharacteristics of MOS-capacitor
VG CG
p-type
VFB
A horizontal shift in C-V curve is observed. Routinely used to characterize MOS capacitor during IC fabrication.
ideal
actual
CG
VG n-type
VFB ideal
actual
Chapt. 18 - Lec 22-11
Enhancement and depletion mode MOSFETs
Device is “on” when VG = 0 depletion-mode n-MOSFET Device is “off” when VG = 0 enhancement-mode n-MOSFET
Threshold adjustment using ion implantation
o ion
T C
ΔV Q
Boron
(+) ion Phosphorous
() ion
ox dose
C
qB = positive shift for acceptor implantation
= negative shift for donor implantation
B = # of boron ions/cm2 ; P = # of phosphorus ions/cm2
B-ion
N+ N+
p-type Si
G
S D
To adjust VT, a controlled number of dopants can be implanted into the near surface region of Si.
ox dose
C qP
Chapt. 18 - Lec 22-13
Example 1
Consider an NMOS with oxide thickness of 0.1 m. The
threshold voltage measured to be 0.5 V. Calculate the boron or phosphorous ions to be implanted to make VT equal to 2 V.
VT = +1.5 V a positive shift. So use boron ions.
2 8
4 14
10 45
10 3 1
0
10 85
8 9
3 . F/cm
cm .
F/cm .
Co .
o ions
T C
B
ΔV q Calculate density of B ions. (3.2
1011 ions/cm2)
During IC fabrication, ion-implantation is routinely used to tailor the the threshold voltage MOSFET device.
Announcements
• Next lecture: Basics of device fabrication p. 149 ~ 174
• Final EXAM: Dec. 15, 13:00 ~ 15:00, 별 232
Everything studied after the Mid-Term EXM
• Homework problem set (due to Dec. 15):
18. 2; 18.6; 18.15
