Chapter 13 Output Stages and Power Amplifiers
¾ 13.1 General Considerations
¾ 13.2 Emitter Follower as Power Amplifier
¾ 13.3 Push-Pull Stage
¾ 13.4 Improved Push-Pull Stage
¾ 13.5 Large-Signal Considerations
¾ 13.6 Short Circuit Protection
¾ 13.7 Heat Dissipation
¾ 13.8 Efficiency
¾ 13.9 Power Amplifier Classes
Why Power Amplifiers?
¾ Drive a load with high power.
¾ Cellular phones need 1W of power at the antenna.
¾ Audio systems deliver tens to hundreds of watts of power.
¾ Ordinary Voltage/Current amplifiers are not suitable for such applications
Chapter Outline
Power Amplifier Characteristics
¾ Experiences low load resistance.
¾ Delivers large current levels.
¾ Requires large voltage swings.
¾ Draws a large amount of power from supply.
¾ Dissipates a large amount of power, therefore gets “hot”.
Power Amplifier Performance Metrics
¾ Distortion - Nonlinearity
¾ Power Efficiency
¾ Voltage Rating – Transistor Breakdown voltage
Power Delivered to Load Power Drawn from Supply η =
Emitter Follower Large-Signal Behavior I
¾ As Vin increases Vout also follows and Q1 provides more current.
(
1)
For 8 ,
1/ 0.8 , thus, 32.5 mA
v L L m
L
m C
A R R g
R
g I
= +
= Ω
= Ω =
¾ If Vin rises from 0.8 V to 4.8V, Vout=4.0V, IL=500mA
C m
T
g I
= V
∵
≈ 0 V 0.8 V
≈
Emitter Follower Large-Signal Behavior II
¾ For Vin=0.8V, Vout=0V, IL=0mA, IE1=32.5mA
¾ For Vin≈0.7V, Vout≈-0.1V, IL=12.5mA, IC1≈IE1=20mA
¾ When all current (32.5mA) flows to the load, Vout=-0.26V
¾ However, as Vin decreases, Vout also decreases, shutting off Q1 and resulting in a constant Vout.
=32.5mA =32.5mA
Example 13.1: Emitter Follower
For 0.5
211 mV by a few iterations
in out
V V
V
=
⇒ ≈ −
1 1 1
1 1
1
,
ln( / ) ln 1
out
in BE out C
L
BE T C S
out
in T out
L S
V V V V I I
R
V V I I
V V V I V
R I
− = + =
=
⎡ ⎛ ⎞ ⎤
− ⎢ ⎜ + ⎟ ⎥ =
⎝ ⎠
⎣ ⎦
¾ Vin=0.5V, Vout=?
By KVL
By KCL
Example 13.1: Emitter Follower
( )
1 1 1
ln
Cin T C L
S
V V I I I R
= I + −
¾ For what Vin, Q1 carries only 1% of I1?
1 1
For 0.01 390 mV
C in
I I
V
≈ ⋅
⇒ ≈
(
IC1 − I1)
Linearity of an Emitter Follower
¾ As Vin decreases the output waveform will be clipped, introducing nonlinearity in I/O characteristics.
Turn-off
Push-Pull Stage
¾ As Vin increases, Q1 is on and pushes current into RL.
¾ As Vin decreases, Q2 is on and pulls current out of RL.
I1
×
Example 13.2: I/O Characteristics for Large V
in¾ For positive Vin, Q1 shifts the output down and for negative Vin, Q2 shifts the output up.
V
out= V
in-V
BE1for large +V
inV
out= V
in+|V
BE2| for large -V
inVBE1 VBE2
Overall I/O Characteristics of Push-Pull Stage
¾ However, for small Vin, there is a “dead zone” (both Q1 and Q2 are off) in the I/O characteristic, resulting in gross nonlinearity.
At least VBE ≈ 600 ~ 700 mV before BJT turns on
Example 13.3: Small-Signal Gain of Push-Pull Stage
¾ The push-pull stage exhibits a gain that tends to unity when either Q1 or Q2 is on.
¾ When Vin is very small, the gain drops to zero.
Gain= out
in
V V
∂
∂
Example 13.4: Sinusoidal Response of Push-Pull Stage
¾ For large Vin, the output follows the input with a fixed DC offset, however as Vin becomes small the output drops to zero and
causes “Crossover Distortion.”
For Vin well above 600 mV, either Q1 or Q2 serves as an emitter follower.
Within the dead zone, Vout ≈ 0 V
Improved Push-Pull Stage
¾ With a battery of VB inserted between the bases of Q1 and Q2, the dead zone is eliminated.
V
B= V
BE1+ |V
BE2|
If Q1 is to remain on, then V1= Vout+VBE1 If Q2 is to remain on, then V2= Vout-|VBE2|
B 1 2
BE1 BE 2
V V V
V V
= −
= +
out B BE 1 in
V =V −V +V
B BE1 BE 2
V =V + V
∵
out BE 2 in
V V V
⇒ = +
B BE 1 BE 2
V V V 0
− + − =
Implementation of V
B¾ Since VB=VBE1+|VBE2|, a natural choice would be two diodes in series.
¾ I1 in figure (b) is used to bias the diodes and Q1. The diodes carry no
current, exhibiting a zero voltage drop
solution
Example 13.6: Current Flow I
I
in1 1 2
in B B
I = I − I + I
1 2
Usually unless 0 flows even when = 0.
B B out
in out
I I V
I V
≠ =
1 2 1 2
if , β = β I
B= I
BWhen Vout =0 V, IL
through RL is 0. Then IC1=|IC2|
Example 13.8: Current Flow II
1 2
0 when 0 if
in out
I = V = I = I
1
→
D BE
V ≈ V V
out≈ V
in1 in D1
V =V +V
out 1 BE1 in D1 BE1
V = −V V =V +V −V
B1 B 2
I ≈ I
Addition of CE Stage
¾ A CE stage (predriver) is added to provide voltage gain from the input to the bases of Q and Q .
Used extensively in high-power output stages
Bias Point Analysis
¾ For bias point analysis for Vout=0, the circuit can be simplified to the one on the right, which resembles a current mirror.
VA=0 Vout=0
, 1
1 3
, 1 S Q
C C
S D
I I I
= I ⋅
if
A D1 BE1
A BE1 D1
A BE1 D1
V V V 0
V V V
V 0 V V
− − + =
= −
= =
Current mirror
D 1 T
V / V C 3 S ,D1
I = I e
C 3
D1 T
S ,D1
V V ln I
= I
A
Emitter size difference between Q1 and D1
Summary
¾ Push-Pull stage could be a possible solution to solve the nonlinearity in emitter follower, but there is still nonlinearity due to dead zone near small Vin
¾ Need to understand large signal behavior of emitter follower.
¾ As Vin decreases the output waveform will be clipped, introducing nonlinearity in I/O characteristics.
¾ Two diodes in series are used to implement the battery of VB.
¾ With a battery of VB inserted between the bases of Q1 and Q2, the dead zone is eliminated.
¾ A CE stage (predriver) is added to provide voltage gain from the input to the bases of Q1 and Q2.
Small-Signal Analysis
1 2
N out
v −v = vπ = vπ
(
1 2)( )
1 2
out N out
m m N out
L
v v v
g g v v
R r
πr
π= − + + −
1 2
1
out L
N L
m m
v R
v R
g g
=
+ +
1 2 1 2
if 1 (+ gm + gm )(rπ rπ ) >>1 Assuming
2rD is small
Emitter follower having a transconductance of gm1+gm2
out N out
V
in in N
v v v
A = v = v v
Small-Signal Analysis
( )( )
4 1 2 1 2
v m m m L
A = − g r
πr
πg + g R
IX
+ -
VX
(
1 2) 0
X X out
V I r
πr
πv
− + + =
(
1 2)( )
out
X m m X out L
v
I g g V v R
=
⎡ + + − ⎤
⎣ ⎦
(
1 2)(
1 2)
1 2X
/
XN m m L
V I
R g g r
πr
πR r
πr
π=
= + +
( )( )
4 1 2 1 2 1 2
1 2
1
out L
m m m L
in L
m m
v R
g g g r r R r r
v R
g g
π π π π
⎡ ⎤
= − ⎣ + + ⎦
+ +
(
1 2)
if 1 R
Lg
m+ g
m>>
Example 13.9: Output Resistance Analysis
3 4
1 2 1 2 1 2
||
1
( )( || )
O O
out
m m m m
r r
R ≈ g g + g g r
πr
π+ +
¾ If β is low, the second term of the output resistance will rise, which will be problematic when driving a small resistance.
Assuming 2rD is small
Example 13.9: Output Resistance Analysis
IX
1 2
v
π= v
π3 4
o o
r r
+ -
VX1 2
1 2 3 4
X
o o
r r
v V
r r r r
π π
π
π π
= − +
(
1 2)
1 21 2 3 4 1 2 3 4
X
X m m X
o o o o
r r
I V g g V
r r r r r r r r
π π
π π π π
= + +
+ +
(
1 1 2 2)(
3 1 4 2)
1
o o
X
X m m
r r r r
V
I g g r r
π π
π π
= +
+ +
(
1 2)(
1 2)
if 1 g + g r
πr
π>> 1
3||
4( )( || )
O O
out
r r
R ≈ +
+ +
Example13.10: Biasing
1 2
Predriver (CE stage): 5
OutputStage: 0.8 for 8 2 100,
V
V L
npn pnp C C
A
A R
I I
β β
=
= = Ω
= = ≈
¾ Compute the required bias current.
( ) ( )
( ) ( )
( )
1 1
1 2 1 2
1 2
1 2
4 1 2 1 2
1
4 3 4
2 4 Thus, 6.5 mA
|| 400 || 200 133
|| 1 4
133 195 μA
m m m m
C C
m m m L
m C C
g g g g
I I
r r
g r r g g R
g I I
π π
π π
− −
−
+ = Ω => ≈ ≈ Ω
≈ ≈
= Ω Ω = Ω
⎡ ⎤
⋅ ⋅ + ⎣ + ⋅ ⎦ =
=> = Ω => ≈ ≈
m
rπ g
=
β
∵
1 2
0.8 8 8 1
m m
g g
=
+ +
C m
T
g I
= V
∵
Problem of Base Current
¾ 195 µA of base current in Q1 can only support 19.5 mA of
collector current, insufficient for high current operation (500 mA for 4 V on 8 Ω).
Modification of the PNP Emitter Follower
¾ Instead of having a single PNP as the emitter-follower, it is now combined with an NPN (Q2), providing a lower output
resistance.
(
2)
31
out
1
m
R ≈ β + g
Gain
(
2)
33
1 1 1
out L
in L
m
v R
v R
g r
πβ
=
+
+ +
( )
2 2 2 2 3
2 2 2 3
C B C
m m in out
I I I
g vπ g v v
β β
β
= = −
= − −
IC3 IB2
IC2
( ) ( )
3 2 3
3
out in out
m in out m in out
L
v v v
g v v g v v
r
πR
β −
− − + − − = −
By KCL
v
π3IX +
-
VXv
π3( )
2 2 2 3
m m in out
g vπ = −
β
g v −v( ) (
2)
32 3
3
Comparing with the standard EF,
1 1
1 1
out
1
m m
r g g
r
πβ β
= ≈
+ + +
Output Resistance
By KCL
3 2 3
3
0
X
X m X m X
I V g V g V
r
πβ
− + + + =
Example 13.11: Input Resistance
( )
3
2 3
3 2 3
1
1 1 ( 1)
L
in in in
L
m
in L
i v v R
r R
g
r R r
π
π
β β β
⎛ ⎞
⎜ ⎟
⎜ ⎟
= −
⎜ + ⎟
⎜ + ⎟
⎝ ⎠
= + +
i
in3 in out
v v
r
π= −
Additional Bias Current
¾ I1 is added to the base of Q2 to provide an additional bias current to Q3 so the capacitance at the base of Q2 can be
charged/discharged quickly. Additional pole at the base of Q2. carries a small current
2 in
0
out EB
Min V
V V
≈
≈
Example 13.12: Minimum V
in2
3 2
in BE
out EB BE
Min V V
V V V
≈
≈ +
Requirement: no saturation
HiFi Design
¾ As Vout becomes more positive, gm rises and Av comes closer to unity, resulting in nonlinearity.
¾ Using negative feedback, linearity is improved, providing higher fidelity.
C m
T
g I
= V
∵
1 2
1
out L
N L
m m
v R
v R
g g
=
+ +
∵
1 2
1
out in
V R
V ≈ + R
∵
Short-Circuit Protection
¾ Qs and r are used to “steal” some base current away from Q1 when the output is accidentally shorted to ground, preventing short-circuit damage.
r: small resistance
Qs reduces the base drive of Q1
if the current exceeds a certain level
0.7 V V
r→
Disadvantages:
- r raises the output impedance
- Vr under normal operating condition reduces the maximum output swing
Emitter Follower Power Rating
( )
0
0 1
2
1 1 1
1
sin
1 sin
2 if
T
av C CE
T P
CC P
L
P P P
CC CC
L L
P I V dt
T
V t
I V V t dt
T R
V V V
I V I V I
R R
ω ω
= ⋅
⎛ ⎞
= ⎜ + ⎟⋅ −
⎝ ⎠
⎛ ⎞
= ⋅ − = ⎜⎝ − ⎟⎠ =
∫
∫
¾ Maximum power dissipated across Q1 occurs in the absence of a signal, i.e. with Vp=0: Pav,max=I1VCC
( )
sin
2ω t = − 1 cos 2 ω t / 2
Example 13.13: Power Dissipation
( )
1 0 1
1
1
Tsin
I p EE
EE
P I V t V dt
T
I V
ω
= −
= − ⋅
∫
¾ Avg Power Dissipated in the Current Source I1
Push-Pull Stage Power Rating
( )
/2
, 0
/2 0
2
1 1 sin
sin
4 4
T
av NPN C CE
T P
CC P
L
CC P P P CC P
L L L
P I V dt
T
V t
V V t dt
T R
V V V V V V
R R R
ω ω
π π
= ⋅
= − ⋅
⋅ ⎛ ⎞
= − = ⎜ − ⎟
⎝ ⎠
∫
∫
¾ No power for half of the period.
( )
sin
2ω t = − 1 cos 2 ω t / 2
/2
0T
cos 2 ω tdt = 0
∫
For Vp≈0 or Vp≈4VCC/π, the power dissipated in Q1 approaches zero
2 2
2 2
cos 2 sin cos cos 1 sin
t t t
t t
ω ω ω
ω ω
= −
= −
Push-Pull Stage Power Rating
( )
/2
, 0
/2 0
2
1
sin
1 sin
4 4
T
av NPN C CE
T P
CC P
L
CC P P P CC P
L L L
P I V dt
T
V t
V V t dt
T R
V V V V V V
R R R
ω ω
π π
= ⋅
= − ⋅
⋅ ⎛ ⎞
= − = ⎜ ⎝ − ⎟ ⎠
∫
∫
¾ No power for half of the period.
¾ Maximum power occurs between Vp=0 and 4Vcc/π.
2
,max CC2 P
when 2
CCav P
L
V V V
P V
R π
π
= ⋅ = ⋅
Push-Pull Stage Power Rating
¾ Maximum power occurs between Vp=0 and 4VCC/π.
, ,
when
av PNP av NPN CC EE
P = P V = − V
2
,max CC2 P
when 2
CCav P
L
V V V
P V
R π
π
= ⋅ = ⋅
( )
, /2
/2
2
1
sin
1 sin
4 4
T
av PNP T C CE
T P
P EE
T L
EE P P P EE P
L L L
P I V dt
T
V t
V t V dt
T R
V V V V V V
R R R
ω ω
π π
= ⋅
⎛ ⎞
= − ⋅ − ⎜ ⎟
⎝ ⎠
− ⋅ ⎛ − ⎞
= − = ⎜ ⎝ − ⎟ ⎠
∫
∫
Heat Sink
¾ Heat sink, provides large surface area to dissipate heat from the chip.
Thermal Runaway Mitigation
1 2
1 2
, 1 , 2
1 2 , 1 , 2
1 2
1 2
, 1 , 2
1 2 , 1 , 2
1 2 1 2
, 1 , 2 , 1 , 2
ln ln
ln
ln ln
ln
With the same ,
D D
D D T T
S D S D
D D T
S D S D
C C
BE BE T T
S Q S Q
C C T
S Q S Q T C C D D
S D S D S Q S Q
I I
V V V V
I I
I I
V I I
I I
V V V V
I I
V I I
I I V I I I I
I I I I
+ = +
=
+ = +
=
=
¾ Using diode biasing prevents thermal runaway since the
currents in Q1 and Q2 will track those of D1 and D2 as long as their Is’s track with temperature.
/
, D T
V V
D S D
I ≈ I e
/
, BE T
V V
C S Q
I ≈ I e
Efficiency
Power Delivered to Load
Power Drawn From Supply Voltage
out out ckt
P
P P
η = =
+
¾ Efficiency is defined as the average power delivered to the load divided by the power drawn from the supply
Emitter Follower
( )
2
2 1 1
1
2
2 2
if and 4
P L
EF
P L CC P EE
P P
EE CC
CC L
V R
V R I V V I V
V V
I V V
V R
η =
+ − − ⋅
= = − =
¾ Maximum efficiency for EF is 25% if VP approaches VCC. Load
Tr.
Current source
Example 13.15: Efficiency of EF
( )
( )
1
2
2 1 1
2 2
/2
With = and 2
2 2
2
2 2
Thus,
1 15
P CC
P CC
EE CC
L L
P L
EF
P L CC P EE
P L
CC CC
P L CC P CC
L L
EF V V
V
I V V V
R R
V R
V R I V V I V
V R
V V
V R V V V
R R
η
η
== − =
= + − − ⋅
=
+ − + ⋅
=
¾ EF designed for full swing operates with half swing.
Efficiency
Push-Pull Stage
2
2
2 2
2 4
4
P L PP
CC
P P P
L L
P CC
V R
V V V V
R R
V V η
π π
= + ⎛ ⎜ ⎝ − ⎞ ⎟ ⎠
=
¾ Maximum efficiency for PP is 78.5% for VP≈VCC.
Example 13.16: Efficiency incl. Predriver
( )
1
2
2
2 ( )
1 4
1 1 1 1 4
P L
P L
P CC P
CC EE
L L
P
CC CC
P CC
I V R
V R
V V V
V V
R R
V
V V
V V
β
η
π β
π β
π β
=
=
+ −
= +
=
+
Power Amplifier Classes
Class A: High linearity, low efficiency
Class B: High efficiency, low linearity
Class AB: Compromise between
Class A and B
Summary
¾ Using negative feedback, linearity is improved, providing higher fidelity
¾ Small signal analysis push-pull stage: gain, Rin, and Rout.
¾ Composite transistor: lower Rout and higher Rin
¾ Efficiency is defined as the average power delivered to the load divided by the power drawn from the supply:
Emitter Follower (25%), Push-Pull (78.5%)
¾ Power rating of devices.
¾ Amplifier classes: Class A, Class B, and Class AB