Thermionic Emission Theory

Chapter 4. PN and Metal-Semiconductor Junctions

Energy band diagram of a Schottky contact with a forward bias V applied between the metal and the semiconductor.

Thermionic Emission Theory

Electron concentration at the interface is

(assuming E

is flat all the way to the peak of the

barrier)

( ) / ( ) /

2

2 2

B B

q V kT n q V kT

C

n N e m kT e

h





 

 

     

It can be shown that the average velocity of the left traveling electron is

2 /

thx n

v   kT  m

2

/ /

2 / 2 / /

3 0

1 4 2

B B

q kT qV kT q kT qV kT qV kT

n

S M thx

J qnv m k T e e KT e e J e

h

 

 _{ }

      

Only half of the electrons travel toward the left.

/ 0

( ) /

B

B

q kT

q V kT

S M

J e

J e







 







Determines how many electrons possess sufficient energy to surpass the peak of the energy barrier and enter the metal.

2

2 2

3

4 qm k

100 /( / K )

K A cm

h

  

called Richardson constant

Chapter 4. PN and Metal-Semiconductor Junctions

Schottky Diodes

At zero bias (V = 0),

the net current is zero.

(0) 0

S M

I _  I (0) 0

M S

I _ I

  

0 _{S M} (0) _{M S} (0) I   I _  I _

/ 2

0 0 ^{q B kT}

,

where I  AJ  AKT e

A diode area  At forward bias,

( ) (0) 0

M S M S

I _ V  I _   I

because the barrier height remains unchanged at the value at equilibrium.

 B

/

2 / /

( ) ^q

^{kT qV kT}

^{qV kT}

S M

I

V  AkT e

^ e  I e

because the barrier height is now smaller by qV.

/ /

0 0 0

( ) _{S M} ( ) _{M S} ( ) ^{qV kT} ( ^{qV kT} 1)

I V  I

V  I

V  I e   I I e 

Chapter 4. PN and Metal-Semiconductor Junctions

Schematic IV characteristics of PN and Schottky diodes having the same area.

Applications of Schottky Diodes

/

0

( ^{qV kT} 1) I  I e 

Block diagram of a switching power supply for electronic equipment such as PCs.

Schottky diode is preferred in low voltage and high current rectifier applications.

~ 40 W ( 50 A × 0.8 V),

if PN junction rectifier is used.

Power consumption =

~ 15 W ( 50 A × 0.3 V)

Schottky Diodes:

• Majority carrier only: high speed/frequency

(negligible minority carrier injection )

• Larger I

→ smaller forward bias→ low power consumption

Clamp diode

Chapter 4. PN and Metal-Semiconductor Junctions

Ohmic Contacts

Semiconductor devices are connected to each other in an integrated circuit through metal. The semiconductor to metal contacts should have sufficiently low resistance.

Ideal ohmic contact: The voltage across an ideal ohmic contact is zero.

For good ohmic contact, the semiconductor must be very heavily doped to have only few nm-thin depletion layer.

Tunneling

2 2

exp 2 8 m (

)

P T V E

h

  

         Tunneling probability,

H Bn

V   E 

dep / 2 T W 

The Fermi level cannot deviate from its equilibrium position and therefore at ideal ohmic contact.

0 n    p 

Or, equivalently, surface recombination velocity

becomes infinity, S   .

Chapter 4. PN and Metal-Semiconductor Junctions

/ 2 2

s Bn dep

d

T W qN

   

2 2

2 2

/

8 8

exp 2 ( ) exp 2

2

Bn d

s Bn

H Bn

d

H N

m m

P T V E

h qN h

e

 

  



   

                 



H Bn ,

V   E 

, 4 (

) /

where H m q

h

 



At V = 0,

0 1

S M M S 2 d thx

J   J

  J

 qN v P

S M

J

If a small voltage is applied across the contact, the barrier for is reduced from to 

₍ 

 _{V )}

( ) /

1 2

Bn d

H V N

S M d thx

J

 qN v e

^

Specific contact resistance [Ω cm

],

/ 0

1 2

Bn d

H N

S M

V thx d

J dJ V V qv H N e dV



 



  

/

2

thx d

V e

R e

J qv H N

 

   

At small V, the net current density is,

(The resistance of a 1 cm

contact)

The IV characteristics of a 0.3 µm (diameter) TiSi

contact on N

-Si and P

-Si.

(From [11]. © 1999 IEEE.)

Theoretical specific contact resistance.

(After [12].)

Chapter 5. MOS Capacitor

MOS Capacitor

Chapter 5

OBJECTIVES

1. Understand the modern MOS structures.

2. Understand the concepts of surface depletion, threshold, and inversion.

3. Understand the MOS capacitor C-V

4. Build the foundation for understanding the

MOSFETs.

Chapter 5. MOS Capacitor

MOS (metal-oxide-semiconductor) Capacitor

The MOS capacitor

An MOS transistor is an MOS capacitor with PN junctions at two ends.

Al (before 1970),

Heavily doped polycrystalline silicon (after 1970) Various metals (after 2008)

Thickness: as thin as ~ 1.5 nm

Silicon dioxide (almost perfect insulator) Advanced dielectrics (after 2008)

The MOS capacitor: the simplest of MOS devices and the structural heart of all MOS devices including

MOSFETs.

Chapter 5. MOS Capacitor

Flat-Band Condition and Flat-Band Voltage

For V _g = 0

Band is not flat.

Applying a negative voltage equal to flat- band voltage (V

) to the gate.

E



E



2

0

:

: [ ]

: [ ]

: [ ]

: [ ]

g

s

Si

SiO

E vacuum level

work function of gate material V work function of semiconductor V

electron affinnity of silicon eV electron affinnity of oxide eV









In SiO

, the exact position of E

has no significance.

60 3

exp[( ) / 10

C C F

n  N E  E kT 

cm



,assuming E

is around in the middle of the SiO

band gap.

fb g s

V    

Flat-Band Voltage

Flat-Band Condition (for V

= V

)

Flat-band E 

 0

E 

 0

g gate

q   

s 0

 

s 0

 

Chapter 5. MOS Capacitor

Surface Accumulation

For V _g < V _fb ^{: [ ]}

: [ ]

:

s s ox

surface potential V q band bending eV V oxide voltage





, .

, .

C s

C

negative if E bends upward positive if E bends downward

 _ ^



hole accumulation (p_s> p₀= N_a)

Potential reference

qV

/

100 200

,

s

q s kT

s a a

f mV

p N e N p

i







  

 





At flat-band, V

 V

, 

 V

 0

g Fm Fs fb s ox

V  E  E  V    V

[ /

] Q

C cm

( ) x



E

 E 

Accumulation layer

s 0

 

Chapter 5. MOS Capacitor

In the case of surface accumulation, is small in a first-order model. 

ox g fb

V  V  V

Using Gauss’s Law at the surface,     D  ( ) x

1 _side 2 _side 3 4 1

,

D AD A D A D AD AD where A A

      



oxide

semiconductor surface

Q

D

D

D

2

0

D 

1

( ) x

D AD  x

    

1 _{s s}

E

E

D      

E E ( )

s s ox ox acc

x Q

A

       

E _ox ^acc

ox

Q

    _ox E _{ox ox} ^acc

ox

V T Q

   C

(deep into semiconductor)

( )

acc ox g fb

Q   C V  V

In general,

sub ox

ox

V Q

  C

All the charge that may be present in the substrate, including Q

.

,

[ /

]

ox

where C F cm

T

 

The MOS capacitor in accumulation behaves

like a capacitor but with a shift in V by V

.

Chapter 5. MOS Capacitor

The MOS capacitor is biased into surface depletion.

(a) Types of charge present;

(b) energy band diagram.

Surface Depletion

For V _g > V _fb

2

sub dep ox

ox ox

a dep a s s

ox ox

Q Q

V C C

qN W qN

C C

 

   

 

2

2

a dep s

s

 qN W

 

( ) x



E

 E



Depletion layer charge

N

2

2

a dep a dep

g fb s ox fb

s ox

qN W qN W

V V V V

 C

      

s/ q kT

s a a

p  N e

 N  p

s 0

 

2 _{s s}

dep

a

W qN

  

Chapter 5. MOS Capacitor

Threshold Condition and Threshold Voltage

For more positive (V _g = V _t > V _fb )

2 0

s st B

     

Threshold condition

s a

n  N

( ) x



E 

E 

Depletion layer charge

N

Surface electron

n s

( E

 E

)

 ( E

 E

)

( E

 E

)

 ( E

 E

)

( )

B i F bulk

q   E  E

Fermi potential energy

sub dep inv dep

Q  Q  Q  Q

E x  ( ) V x ( )

( ) ( ) E

s

d x x

dx



  ( )

E ( )

dV x x

dx  

(0) (0)

E E

s s ox ox

  

0

x  x

Chapter 5. MOS Capacitor

Theoretical threshold voltage vs. body doping concentration.

( )

ln

B i F bulk

a i

q E E

kT N n

  



Fermi potential energy

2

exp[ ( ) / ] exp[ ( ) / ]

exp[ / ]

i C C i

V F V

i C V g

n N E E kT

p N E E kT

n N N E kT

  

  

 

At threshold,

2 2 ln ^a

s st B

i

N kT

q n

     

Threshold Voltage, V

(V

at the threshold condition)

2

2

2

2 2 2

s B

t g fb s ox

a dep a dep

fb

s ox

a s B

t fb B

ox

V V V V

qN W qN W

V C

V V qN

C

  



  

    

  

   

For N-Type Body

2

2 , ln

d s st

t fb st

ox

d

st B B

i

V V qN

C kT N

q n

  

  

  

  

For P-Type Body

Chapter 5. MOS Capacitor

An MOS capacitor is biased into inversion.

Strong Inversion beyond Threshold

( ) x



E

 E



Depletion layer charge

N a

Inversion layer

(thickness: ~5 nm)

[ / 2 ]

Q inv C cm n _s  N _a

Inversion layer charge density

Surface becomes N-type.

WithV

> V

, does not increase much further beyond since even small increase in would induce a much larger surface electron density and therefore a larger V

that would soak up the V

.

 s

2  _B

 s

2

exp( )

2

B

.

s s

s B

Surface potential is essentially pinned at

n q

kT





 



 



For V _g > V _t

sub dep inv

Q  Q  Q

Chapter 5. MOS Capacitor

2 ,

s B

If  ^  _{dep d max} ^{2 2 s B}

a

W W

qN

   

2

2 2 2 2

sub

g fb s ox fb B

ox

dep inv a s B inv

fb B fb B

ox ox ox ox

inv t

ox

V V V V Q

C

Q Q qN Q

V V

C C C C

V Q

C

 

   

     

       

 

sub dep inv

Q  Q  Q

sub ox

ox

V Q

  C

( )

inv ox g t

Q C V V

    The MOS capacitor in strong

inversion behaves like a

capacitor except for a voltage offset of V

.

There are few electrons in the P-type body, and it can take minutes for thermal generation to

generate the necessary electrons to form the inversion layer.

How to solve this problem?

(a) The surface inversion behavior is best studied with a PN junction

butting the MOS capacitor to supply the inversion charge. (b) The

inversion layer may be thought of as a thin N-type layer.

Chapter 5. MOS Capacitor

Review: Basic MOS Capacitor Theory

Surface potential saturates at 2 ϕ _B in inversion when V _g is larger than V _t and saturates at Vf _b in

accumulation.

Depletion-region width in the

body of an MOS capacitor.

Chapter 5. MOS Capacitor

Components of charge (C/cm ² ) in the MOS capacitor substrate: (a) depletion-layer charge;

(b) inversion-layer charge; and (c) accumulation- layer charge.

The total substrate charge, Q _sub (C/cm ² ),

is the sum of Q _acc , Q _dep , and Q _inv .

Chapter 5. MOS Capacitor

Q _sub Vs. Surface Potential

( /

)

Q

C cm 2 



s

( ) V

