Chapter 14 Output Stages and Power Amplifiers

Chapter 14 Output Stages and Power Amplifiers

 14.1 General Considerations

 14.2 Emitter Follower as Power Amplifier

 14.3 Push-Pull Stage

 14.4 Improved Push-Pull Stage

 14.5 Large-Signal Considerations

 14.6 Short Circuit Protection

 14.7 Heat Dissipation

 14.8 Efficiency

 14.9 Power Amplifier Classes

Why Power Amplifiers?

 Drive a load with high power.

 Cellular phones need 1W of power at the antenna.

 Audio systems deliver tens to hundreds of watts of power.

 Ordinary Voltage/Current amplifiers are not suitable for such applications

Chapter Outline

Power Amplifier Characteristics

 Experiences low load resistance.

 Delivers large current levels.

 Requires large voltage swings.

 Draws a large amount of power from supply.

 Dissipates a large amount of power, therefore gets “hot”.

Power Amplifier Performance Metrics

 Distortion - Linearity

 Power Efficiency

 Voltage Rating – Transistor Breakdown voltage

Emitter Follower Large-Signal Behavior I

 As V_in increases V_out also follows and Q₁ provides more current.





For 8 ,

1/ 0.8 , thus, 32.5 mA

v L L m

L

m C

A R R g

R

g I

 

 

  

 For V_in=4.8V, V_out=4.0V, I_L=500mA, I_E1=532.5mA

Emitter Follower Large-Signal Behavior II

 For V_in=0.8V, V_out=0V, I_L=0mA, I_E1=32.5mA

 For V_in=0.7V, V_out=-0.1V, I_L=12.5mA, I_E1=20mA

 When all current (32.5mA) flows to the load, V_out=-0.26V

 However, as V_in decreases, V_out also decreases, shutting off Q₁ and resulting in a constant V_out.

Example 14.1: Emitter Follower

For 0.5

211 mV by a few iterations

in out

V V

V



  

1 1 1

1 1

1

,

ln( / ) ln 1

out

in BE out C

L

BE T C S

out

in T out

L S

V V V V I I

R

V V I I

V V V I V

R I

   



   

      

 

 

 V_in=0.5V, V_out=?

Example 14.1: Emitter Follower

 

1

1 1

ln

in T C L

S

V V I I I R

 I  

 For what V_in, Q₁ carries only 1% of I₁?

1 1

For 0.01 390 mV

C in

I I

V

 

 

Linearity of an Emitter Follower

 As V_in decreases the output waveform will be clipped, introducing nonlinearity in I/O characteristics.

Push-Pull Stage

 As V_in increases, Q₁ is on and pushes current into R_L.

 As V_in decreases, Q₂ is on and pulls current out of R_L.

Example 14.2: I/O Characteristics for Large V

 For positive V_in, Q₁ shifts the output down and for negative V_in, Q₂ shifts the output up.

V

= V

-V

for large +V

V

= V

+|V

| for large -V

Overall I/O Characteristics of Push-Pull Stage

 However, for small V_in, there is a “dead zone” (both Q₁ and Q₂ are off) in the I/O characteristic, resulting in gross nonlinearity.

Example 14.3: Small-Signal Gain of Push-Pull Stage

 The push-pull stage exhibits a gain that tends to unity when either Q₁ or Q₂ is on.

 When V_in is very small, the gain drops to zero.

Example 14.4: Sinusoidal Response of Push-Pull Stage

 For large V_in, the output follows the input with a fixed DC offset, however as V_in becomes small the output drops to zero and

causes “Crossover Distortion.”

Improved Push-Pull Stage

 With a battery of V_B inserted between the bases of Q₁ and Q₂, the dead zone is eliminated.

V

= V

+ |V

|

Implementation of V

 Since V_B=V_BE1+|V_BE2|, a natural choice would be two diodes in series.

 I in figure (b) is used to bias the diodes and Q .

Example 14.6: Current Flow I

I

1 1 2

in B B

I   I I  I

1 2

Usually unless 0

flows even when = 0.

B B out

in out

I I V

I V

 

Example 14.8: Current Flow II

1 2

0 when 0 if

in out

I  V  I  I

1

→

D BE

V  V V

 V

Addition of CE Stage

 A CE stage (predriver) is added to provide voltage gain from the input to the bases of Q₁ and Q₂.

Bias Point Analysis

 For bias point analysis for V_out=0, the circuit can be simplified to the one on the right, which resembles a current mirror.

V_A=0 V_out=0

, 1

1 3

S Q

C C

I I I

 I 

Small-Signal Analysis

 Assuming 2r_D is small and (g_m1+g_m2)R_L is much greater than 1,

 

      

  

4 1 2

4 1 2 1 2 1 2

4 1 2 1 2

( 1)

1

v m L

m m m L

m m m L

A g r r R

g r r r r g g R

g r r g g R

 

   

 



 

     

 

      

  

Example 14.9: Output Resistance Analysis

3 4

1 2 1 2 1 2

1 ||

( )( || )

O O

out

m m m m

r r

R  g g  g g r

r

 

 If β is low, the second term of the output resistance will rise, which will be problematic when driving a small resistance.

Example14.10: Biasing

1 2

Predriver (CE stage): 5

Output Stage: 0.8 for 8 2 100,

V

V L

npn pnp C C

A

A R

I I

 



  

  

 Compute the required bias current.

   

   

 

1 1

1 2 1 2

1 2

1 2

4 1 2 1 2

1

4 4

2 4

Thus, 6.5 mA

|| 400 || 200 133

|| 1 4

133 195 μA

m m m m

C C

m m m L

m C

g g g g

I I r r

g r r g g R

g I

 

 

 



      

 

    

 

       

    

65uA

135uA

6.5mA 6.5mA 195uA

60uA 125uA

Problem of Base Current

 195 µA of base current in Q₁ can only support 19.5 mA of

collector current, insufficient for high current operation (500 mA for 4 V on 8 ).

Modification of the PNP Emitter Follower

 Instead of having a single PNP as the emitter-follower, it is now combined with an NPN (Q₂), providing a lower output

resistance.



^{1 1} 

out

m

R ^   g

Example 14.11: Input Resistance





3

1 1 1

out L

in L

m

v R

v R

g r







    



2 3

3

Comparing with the standard EF,

1 1

1 1

1

out

m m

r g

g r

 

 

  

Example 14.11: Input Resistance

 

3

2 3

3 2 3

1

1 1 ( 1)

L

in in in

L

m

in L

i v v R

r R

g

r R r







 

 

 

 

 

  

  

 

  

Additional Bias Current

 I₁ is added to the base of Q₂ to provide an additional bias current to Q₃ so the capacitance at the base of Q₂ can be

charged/discharged quickly. Additional pole at the base of Q .

2 in

0

out EB

Min V

V V





Example 14.12: Minimum V

2

3 2

in BE

out EB BE

Min V V

V V V



 

Power Amplifier Classes

Class A: High linearity, low efficiency

Class B: High efficiency, low linearity

Class AB: Compromise between

Class A and B

HiFi Design

 As V_out becomes more positive, g_m rises and A_v comes closer to unity, resulting in nonlinearity.

 Using negative feedback, linearity is improved, providing higher fidelity.

Short-Circuit Protection

 Q_s and r are used to “steal” some base current away from Q₁ when the output is accidentally shorted to ground, preventing short-circuit damage.

Power transistors

 Package and heat sink

Small-signal Transistor Power Transistor in Heat Sink Power Transistor Inside

Emitter Follower Power Rating (Class A)

 

0

0 1

2

1 1 1

1

sin

1 sin

2 if

T

av C CE

T P

CC P

L

P P P

CC CC

L L

P I V dt

T

V t

I V V t dt

T R

V V V

I V I V I

R R

 

 

 

    

 

 

       





 Maximum power dissipated across Q₁ occurs in the absence of a signal.

Pull down is done

by a current source

with huge current!

Example 14.13: Power Dissipation

 

1 0 1

1

1

sin

I p EE

EE

P I V t V dt

T

I V



 

  



 Avg Power Dissipated in the Current Source I₁

Push-Pull Stage Power Rating

 

/2

, 0

/2 0

2

1

sin

1 sin

4 4

T

av NPN C CE

T P

CC P

L

CC P P P CC P

L L L

P I V dt

T

V t

V V t dt

T R

V V V V V V

R R R

 

 

 

  

  

       





 No power for half of the period.

Push-Pull Stage Power Rating

 

/2

, 0

/2 0

2

1

sin

1 sin

4 4

T

av NPN C CE

T P

CC P

L

CC P P P CC P

L L L

P I V dt

T

V t

V V t dt

T R

V V V V V V

R R R

 

 

 

  

  

       





 No power for half of the period.

 Maximum power occurs between V_p=0 and 4V_cc/π.

2

,max ^CC2 ^P

when 2

av P

L

V V V

P V

R 



   

Push-Pull Stage Power Rating

 Maximum power occurs between V_p=0 and 4V_CC/π.

, ,

when

av PNP av NPN CC EE

P  P V   V

2

,max ^CC2 ^P

when 2

av P

L

V V V

P V

R 



   

 

, /2

/2

2

1

sin

1 sin

4 4

T

av PNP T C CE

T P

P EE

T L

EE P P P EE P

L L L

P I V dt

T

V t

V t V dt

T R

V V V V V V

R R R

 

 

 

 

     

 

    

     

 





Heat Sink

 Heat sink, provides large surface area to dissipate heat from the chip.

Thermal Runaway Mitigation

1 2

1 2

, 1 , 2

1 2 , 1 , 2

1 2

1 2

, 1 , 2

1 2 , 1 , 2

1 2 1 2

, 1 , 2 , 1 , 2

ln ln

ln

ln ln

ln

With the same ,

D D

D D T T

S D S D

D D T

S D S D

C C

BE BE T T

S Q S Q

C C T

S Q S Q T C C D D

S D S D S Q S Q

I I

V V V V

I I

I I

V I I

I I

V V V V

I I

V I I

I I V I I I I

I I I I

  



  





 Using diode biasing prevents thermal runaway since the

currents in Q₁ and Q₂ will track those of D₁ and D₂ as long as their I ’s track with temperature.

Efficiency

Power Delivered to Load

Power Drawn From Supply Voltage

out out ckt

P

P P

  



 Efficiency is defined as the average power delivered to the load divided by the power drawn from the supply

Emitter Follower (Class A)

 

2 2

1 1

1

2

2 2

if and 4

P L

EF

P L CC P EE

P P

EE CC

CC L

V R

V R I V V I V

V V

I V V

V R

 

   

   

 Maximum efficiency for EF is 25%.

Example 14.15: Efficiency of EF

 

 

1

2 2

1 1

2

2

/ 2

With = and 2

2 2

2

2 2

Thus,

1 6.7%

15

P CC

P CC

EE CC

L L

P L

EF

P L CC P EE

P L

CC CC

P L CC P CC

L L

EF V V

V

I V V V

R R

V R

V R I V V I V

V R

V V

V R V V V

R R



 _

  

    



   

 

 EF designed for full swing operates with half swing.

Efficiency

Push-Pull Stage (Class A or AB)

2

2

2 2

2 4

4

P L PP

CC

P P P

L L

P CC

V R

V

V V V

R R

V V







      

 



 Maximum efficiency for PP is 78.5%.

Example 14.16: Efficiency incl. Predriver

 

1

2

2

2 ( )

1 4

1 1

1 1

4

P L

P L

P CC P

CC EE

L L

P

CC CC

P CC

I V R

V R

V V V

V V

R R

V

V V

V V





 

 

 





 

 



