• 검색 결과가 없습니다.

PDF Logic Design - Seoul National University

N/A
N/A
Protected

Academic year: 2024

Share "PDF Logic Design - Seoul National University"

Copied!
6
0
0

로드 중.... (전체 텍스트 보기)

전체 글

(1)

Logic Design

Chang-Gun Lee ([email protected]) Associate Professor

The School of Computer Science and Engineering Seoul National University

(2)

Before We Start ….

Passive vs. Active Learning

• After 2 weeks, we tend to remember

• Passive learning

– 10% of what we read – 20% of what we hear

– 30% of what we see (picture) – 50% of what we hear and see

• Active learning

– 70% of what we say

– 90% of what we say and do

(3)

Everybody! be an Active Learner

• recall prior material

• answer a question (say a lot!)

• guess the solution first (even guessing wrong will help you to remember the right approach)

• raise questions

• think of application

• imagine that you were the professor and think about how you would give a test on the subject material so that key concepts and results will be checked

• summarize a lecture, a set of homework or a lab in your own words concisely

An Active Learner will become an Independent Researcher

and Engineer

(4)

Course Information

• Class Meeting Times: Tue/Thur 4 - 5:15pm

• Office Hour: Tuesday 12 - 1pm at 301-409 (Lunch will be served by appointment)

– come to me pretty often

• Textbook: Contemporary Logic Design, 2

nd

Edition:

Randy H. Katz and Gaetano Borriello

• Contact:

– Chang-Gun Lee ([email protected], 880-1862, 010-6549-5605) – TA: Kyung-soo Wee ([email protected])

• Grading (Tentative)

– Attendance/Active participation: 10%

– Homework & Projects: 15%

– Midterm: 35%

– Final: 40%

(5)

Course Philosophy

• Digital Logic Design is the base for many digital systems

– Digital watch – DVD players – Cell Phones – Computers

• Students will be trained with

• How to make digital systems from simple gates

• How to optimize the design

• How to validate your design

• How to design digital systems just like SW programming

(6)

Topics

CMOS basics

Simple Gates (AND, OR, NOT, NAND, NOR)

Combinational Logic Design

Sequential Logic Design

Hardware Description Language

참조

관련 문서

AHB - Operation  Master sends a request signal to the Arbiter  Arbiter grants the bus to the Master  Master starts transfer by sending address and control signals and data 

Figures 2a and 2b compare the execution units and buses of a conventional DSP the Lucent Technologies DSP16xx to an enhanced-conventional DSP that extends the DSP16xx architecture the

there is a timing "window" around the clocking event during which the input must remain stable and unchanged in order to be recognized clock data changing stable input clock

Step 2 The subsidiary equation is solved by purely algebraic manipulations3. Step 3 The solution in Step 2 is transformed back, resulting in the solution of

Material outside the cell is engulfed by a portion of the plasma membrane which encircles it to form a vesicle.The vesicle then pinches off from the plasma membrane and

It is essential for the extension of hospital to create an architectural system on the basis of function, and to keep the balance with both the existing buildings and natural

5.2 POTENTIAL STEP UNDER DIFFUSION CONTROL ▪ Consider an experiment involving an instantaneous change in potential from a value where no electrolysis occurs to a value in the

If quantum numbers are large and the energy levels are closely located, what will be the density of quantum states, g for the particles moving in one dimensional space whose length is