Visible Light Communication Systems for Sensor Networks Using Synchronizing Pulse Transmission Through the Power Lines

≠Ô˙–‚˙Ζ≥ ¸⁄ IT ^{ÃÓ¯–˙} (Department of Electronic &

IT Media Engineering, Seoul National University of Science and Technology)

232 Gongneung-ro, Nowon-gu, Seoul 139-743, Korea

+

Corresponding author : [email protected] (Recevied : Apr. 29, 2013, Accepted : May. 20, 2013)

This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License(http://creativecommons.org/licenses/by- nc/3.0)which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

1. ≠ –

°√§Î≈ (Visible Light Communication; VLC) ^{∫ ∂ÌÎ∏}

Œ ÁÎœ¬ §¯ª ¸‚˚∏Œ Ì” Ø∂‘∏Œ· — ≥« §¯∏

Œ ∂Ì˙ Î≈ª ‚œ¬ ∏∂Œ≠ √∫¤« ∏∫à £ÌœÌ «ª

« Ÿ≈Æ°≠ ±‘ ´±∏Œ •ÃÕ¶ ¸¤“ ˆ ÷Ó ÁÎœ‚°

ÌÆ— °à ÷Ÿ .

ÃØ— VLC ‚˙∫ ¸¤≈ºŒ §∂ض ÁÎœˆ  ¬ ´±§

Î≈« œæ∏Œ≠ ‚∏« ˚‹± LED ¶ ÃΗ ´±§Î≈ [1-3]

˙ ˜Ã °∫ ‚∏« ˚‹± §¯ Î≈° °√§ LED ^{¶ §¯∏Œ}

ÁÎœ¬ °ÃŸ . ‚∏« ˚‹± ´±§Î≈˙ Ò≥“ ß , ^°√§

LED ^{¶ ÃÎœ¬} VLC ¬ œ§— ∂ÌÛ¬¶ ؈‘˙ ø√° •Ã Õ« ¸¤ª ¥‡œ¬ ∏∂ ßÆ° ∂ÌÛ¬¶ Ì¡œˆ  ¬

‚∏« ˚‹± ʃ° Òœ© ∏ˆ˙§° ¶‡∂«Ã πΔ¯Ÿ .

∂ÌÎ fl§ŸÃ¿Â (Light-Emitting Diode; LED) ^{¬ ©‚°}

¤Ì °≠ÏÁ , ‚∏« ∂Ì° Òœ© Ø∂ ”μ° °Û VLC ^{° ˚}

’— §¯∏Œ πà ÃÎ«Ì ÷Ÿ [4-6].

ÃØ— °√§ LED « ØÎ∫° Îÿ≠¬ ÷Ÿ° ͘˚ ¯È°

≠ ⁄÷ fi«Ó ‘∏™ øœ¯£°≠ øœ— ƒÂΙ« °√§

ª ©Ø §ŒÃ ÁÎœ¬ ÊÏ° fl˝œ¬ §Œ£« •≈ ƶ¶

Ÿª˚∏Œ ÿ·œ‚ ß— ‚˙Ù ¸√ ÆÂ∫ ≈« flfl«ˆ   Ì ÷Ÿ .

∂ÌÎ LED ¬ °√§± Ι« ˚ª fl˝œ¬ §¯Ã«Œ øœ

— ˆÛª °¯ ©Ø ≥« VLC ≈£§Ã ¯£Û°≠ •’«¬ Ê Ï°¬ Œ¢» §Œ« ≈£§Ã ˆ≈Œ° Ø‘«Ó •≈ª fl˝√

∞¬ ÊÏ° πŸ . ^{˚Û≠ ∂ÌÎ} LED ¶ ÁÎœ© «ª°≠ VLC

√∫¤ª ∏‡œ¬ ÊÏ°¬ ÃØ— §Œ£« •≈ª ʈœ‚ ß

— ‚˙μ Ê–˜ Ì¡œ© √∫¤ª ≥Ëœ©fl —Ÿ .

ª ÌÆ°≠¬ ÃÕ ∞à §Œ£ •≈ª ʈœ‚ ßœ© √–“

VLC √∫¤ª ∏‡œ¬ ÊÏ° 220 V ¸¬±ª Îœ© ø‚≈£

¶ ¯fiœ¬ Ê˝ª ıŒÃ ¶»œÌ «Ëœ¥Ÿ . ^{à ʃ°≠ ı}

ŒÓ °∫ ‚∏« ¸¬±Î≈ [7] ^ª VLC √∫¤ £° •≈ª ʈœ

‚ ß— ø‚≈£ ¯fiÎ §ŒŒ ∞Η •° ÷Ÿ . ^{œ›˚∏Œ «}

ª°≠¬ øœ— ¸¬±° ©Ø ≥« ¢”‹⁄¶ –Í Ë°œ© Á Îœ«Œ , ¸¬±ª Îœ© ø‚≈£¶ ¸¤œÈ VLC ^{√∫¤° °}

pISSN 1225-5475/eISSN 2093-7563

¸¬± ¸¤ ø‚≈£¶ ÃΗ æ≠ ◊ƈ©Î

°√§Î≈√∫¤

Ã∫£+

Visible Light Communication Systems for Sensor Networks Using Synchronizing Pulse Transmission Through the Power Lines

Seong-Ho Lee

Abstract

In this paper, we introduce a new method to reduce the inter-channel crosstalk in visible light communication (VLC) systems using the synchronizing pulses transmitted through the power lines. Synchronizing pulses are simultaneously transmitted to multiple VLC transmitters and receivers through the 220V power line. Each VLC transmitter modulates an LED and each VLC receiver demodulates the signal light in the time slot that is allocated with reference to the synchronizing pulses. This method is very simple and effective to prevent the inter-channel crosstalk in VLC systems for sensor networks because every VLC system can easily get the synchronizing pulses from the nearby power line.

Keywords : LED, Visible light communication, Power line, Synchronizing pulse, Crosstalk

ÓÓ ¸¬±∏ŒŒÕ ø‚≈£¶ ±‘ Úª ˆ ÷‚ ßÆ° ø‚≈

£Î §Œ Æ∏° ≈Ï £ÌœÁ , ^æ≠Î VLC ^{◊ƈ©¶ ∏∫“}

ß ©Ø ≥« VLC §Œ £ £∑ª ʈ“ ˆ ÷¬ √∫¤ª ≈Ï ±

‘ ∏‡“ ˆ ÷Ÿ .

2. √∫¤« ∏∫ ◊ ø¤¯Æ

¸¬±ª Η ø‚≈£¶ ÃÎœ© •≈ª ʈœ‚ ß— √–

“ VLC ^{√∫¤« ∏∫μ¬} Fig. 1 ^{˙ ∞Ÿ} .

fi∫ fl˝‚°≠¬ ∏¸fi∫¶ ÷‚˚∏Œ fl˝œÌ ö ASK

Ø∂— ƒ PLC (Power Line Coupler) ^{¶ Îœ©} 220 V ^¸¬±∏Œ

¸¤—Ÿ . 2 ^≥« VLC ^¤≈Œ (Tx1, Tx2) ^Õ 2 ^{≥« ˆ≈Œ} (Rx1, Rx2) ¬ ¢¢ Œ¢— ¸¬±∏ŒŒÕ PLC ¶ Îœ© fi∫¶ ˆ≈

fiΔ ˆ§» Time slot °≠ •ÃÕ¶ ¤≈œÌ ˆ≈—Ÿ . VLC ^{√∫¤°≠} LED ¬ ∂Ì˙ Î≈« ™“ª ø√° ˆ‡ÿfl œ«Œ •ÃÕ« ¸¤ Ø´° ¸Ë¯Ã ◊Û œ§— ‡‚¶ ؈œ©

Ù⁄≈≤ ˆÛ (flickering) à fl˝œˆ  μœ √∫¤ª ∏∫œ©

fl —Ÿ . ˚Û≠ •ÃÕ ¸¤ ˙§°≠ LED ‚¬§« ≠μ Ø≠°

fl˝œˆ  μœ Frequency Shift Keying (FSK) ^ʃ∏Œ LED1

˙ LED2 ¶ Ø∂œ© ⁄د£∏Œ ÊÁ—Ÿ .

LED1 ^˙ LED2 ° ≠Œ Ÿ¢œ© ≥°«Ó Œ ≥« ≈£§Ã ¯

£Û°≠ fl∏«Ó ÷Ÿ . ÃÕ ∞∫ ØÊ°≠ Œ ≥« §Œ£ •≈

à fl˝œˆ  μœ ¸¬±ª Îœ© ˆ≈» ø‚fi∫¶ ‚ÿœ©

¢ §Œ ∞Œ Time slot ª “ÁœÌ à ‚£ ø» ≈£¶ ¤ˆ≈—

Ÿ . ^{ÃÕ ∞à Œ ≥«} VLC ≈£§Ã √–“«Ó ¸¤«¬ ˙§ª μƒ˚∏Œ ™∏ªÈ Fig. 2 ^{Õ ∞Ÿ} . Fig. 2(a) ^{¬ ¸¬±ª Îœ©}

ˆ≈» ø‚fi∫¶ ™∏ªÁ à ø‚fi∫¶ ‚ÿœ© CH1 ^˙ CH2

« •ÃÕ¶ ¸¤œ‚ ß— Time slot à ˆ§» ¸¬¶ ™∏ΩŸ . Fig. 2(b) ^¬ Time slot1 ^{ø» ¸¤«¬} CH1 ^{« •ÃÕŒ≠} High ^Õ Low Û¬« ÒÆ≠Œ •ÃÕ° ∏∫» π¶ ™∏ΩŸ . Fig. 2(c) ^¬ Fig. 2(b) ^{« •ÃÕ°} FSK ^{Ø∂» Û¬Œ≠} High ^{Û¬°≠¬ ÷ƒ}

ˆ f1, Low ^{Û¬°≠¬ ÷ƒˆ} f2 « ÁŒƒ¶ ؈œÁ à ≈£°

LED1 ^{° °ÿ¯Ÿ} .

Fig. 2(d) ^¬ Time slot2 ^{ø»° ¸¤«¬} CH2 ^{« •ÃÕ¶ ™∏}

ªÁ , Fig. 2(e) ^¬ CH2 ^{« •ÃÕ°} FSK Ø∂» Û¬Œ≠ ©‚°≠

μ High ^Õ Low ^{Û¬¬ ¢¢ ÷ƒˆ} f1 ^Õ f2 « ÁŒƒ¶ ؈—Ÿ . CH1 à ¸¤«¬ ‚£ ø» CH2 ^{¬ Ë”} Low ^{Û¬« ÷ƒˆ} f2 ^¶

؈œÁ , ^{∞∫ Ê˝∏Œ} CH2 ° ¸¤«¬ ‚£ ø» CH1 ^∫ Low

Û¬« ÷ƒˆ f2 ^{¶ ؈—Ÿ} . ^«Ë°≠¬ f1=50 kHz, f2=200 kHz « ÁŒƒ¶ ÁÎœ© FSK ^Ø∂œ¥Ÿ .

Fig. 1. VLC systems using the synchronizing pulses through the 220 V power line.

Fig. 3. VLC receiver configuration; (a) VLC Receiver and (b) BPF

ÃÕ ∞à 2 ^≥« LED ^{¶ √–“ œ©} FSK ¸¤œ¬ ÊÏ ˆ≈Œ

°≠ ¯ ≈£¶ π∂œ‚ ß— ∏∂¬ Fig. 3 ^{˙ ∞Ÿ} .

Fig. 3(a) ^¬ VLC ^{ˆ≈Œ« ∏∫μÃÁ} , ^’« Fig. 1 ^{°≠ ∏Œ} 2 ^≥

« ˆ≈Œ (Rx1, Rx2) ^{« ∏∂¬ øœœŸ} . Fig. 3(b) ^{¬ ˆ≈ Œ°}

ÁΗ ΙÎ˙ Õ (BPF) « Î˙Ø∫ª ™∏ΩŸ . ^{Œ ≥« ≈£§}

à •’«Ó ˆ≈«¬ ÊÏ° High (f1) ^{Û¬« ÒÆ°} Low ^{Œ ŸÓ}

≈™ Low(f2) ^{Û¬« ÒÆ°} High Œ fl¯ Œƒ«¬ ÊÏ° ¿ø

¤Ã fl˝—Ÿ . ÃØ— ˆÛª ʈœ‚ ßœ© High ^{Û¬« ÷ƒ}

ˆ (f1) Õ œ°œ¬ fl…÷ƒˆ¶ °ˆ¬ BPF ^{¶ ˆ≈Œ° ≥°—}

Õß . 2 ^{≥« ˆ≈Œ} (Rx1, Rx2) « ø¤¯Æ¬ øœœÁ Ì«Û

Rx1 ª ‚ÿœ© ø¤˙§ª ≠˙—Ÿ

’« Fig. 1 ^{˙ ∞à Œ ≥«} LED ŒŒÕ ÊÁ» ≈£§Ã ¯£°

≠ fl∏«Ó PD1(Photo-Detector 1) ^{° ‘Áœ¬ ÊÏ} , CH1 ^Ã

∞ High ^{±Û¬« ÒÆÃÁ} , CH2 ^{° §ˆ‚£ Ô} , ^∞ Low ^{±Û¬¶ ؈}

“ ß , PD1 « À‚¸–ª ˆƒ˚∏Œ ™∏ªÈ ŸΩ˙ ∞Ÿ .

©‚°≠ Ò¬ ˜‰ŸÃ¿Â« ¿‰μ , R L Œœ˙◊ª ™∏ªÁ , k 1 ˙ k 2¬ ¢¢ LED1 ^˙ LED2 ^ŒŒÕ PD1 ∏Œ« §·’ˈ¶ ™

∏ΩŸ . P1 ^˙ P2 ^{¬ ¢¢} LED1 ^˙ LED2 « §‚¬« ¯¯ÃÌ , ¯ 1

˙ ¯ 2¬ ¢¢∞ High ^±Û¬Õ∞ Low ^{±Û¬° ÿÁœ¬} FSK ^÷ƒˆ

ÃÁ , ^{‰ ¬} t=0 ^°≠ LED1 ^˙ LED2 « Ø∂ ≈£ Áð fl˝œ¬ ß Û˜¶ ™∏ΩŸ . 2 ^≥« LED ^{Áë ≈Æ°} PD ^{Óˆ« ≈Æ° Òœ}

© ˆ˙˜ ¤ª ÊÏ°¬ §·’ˈ k1 ^˙ k2 ° ≈« øœ— ™ª

°ˆ«Œ k 1õ k 2õ k 0Œ ™∏æ ˆ ÷Ÿ . ^˚Û≠ PD1 ^{« À‚¸–∫}

∏Œ ™∏æ ˆ ÷Ÿ . PD1 ^{« À‚¸–Ã} Amp ^Õ BPF ^{¶ Î˙—}

ƒ« ‚¬¸–∫ ŸΩ˙ ∞Ã μ ˆ ÷Ÿ .

©‚°≠ G ¬ ı¯‚« ¸–ÃÊÃÁ , H(j ¯ ) ^¬ BPF ^{« Î˙ˈ}

¶ ™∏ΩŸ . Fig. 3(a) ^{°≠ Áλ} BPF ^{∏Œ« Î˙ˈ¬}

ß . ^{©‚°≠ ¯¯÷ƒˆ} ¯ 0 = ^ß . ^«Ë°≠ R=100

ÿ , L=100 ^Ï H, C=0.1 uF ^{œ ß ¯¯÷ƒˆ¬} f 0ô 50 kHz ^Ã˙∏

Á , ^ƒ (4) ¶ ÁÎœ©  Õ« Î˙Ø∫ª μ√œÈ ’« Fig. 3(b) ^Õ

∞Ÿ . LED ^« FSK ^{Ø∂° Áλ} 2 ^{≥« ÷ƒˆ} f 1 =50 kHz, f 2 =200 kHz ^°≠ BPF ^{« Î˙ˈ ©‚¬} |H(j ¯ 1 )|=1, |H(j ¯ 2 )| ^õ 0.08 ^Ã

«Ó BPF Î˙ ƒ« ¸–ª ™∏ª¬ ƒ (3) ^°≠ P 1∫–« ¯¯∫

BPF ¶ Î˙œ‚ ¸˙ øœœˆ∏ , P 2 ∫–∫ BPF ^{¶ Î˙œÈ≠}

©‚° 0.08 ËŒ ˆ˙˜ ŸÓÁŸ . ^{˚Û≠ ’« ƒ} (3) ^°≠ BPF ^Î

˙ ƒ« ¸–∫

ÃÁ , ^{©‚°≠ Ûˆ} A= ^Ò R ^L K ^O G ^ß . à ¸–« ©‚¬ ßÛ j1 , j2 , ‰° ˚Û Ãºœ‘ Ø≠œÁ , ^¤≈Œ°≠ 2 ^≥« LED ^{« §}

‚¬ P1 ^˙ P2 « º‚° ØÁ“ ÊÏ ¯¯À‚‚ (envelope detector) ^{« ‚¬¸–} ( ^Ì 2 ) ^{¬ ƒ} (5) ^ŒŒÕ

à »Ÿ . ^«∞∏Œ (threshold circuit) ^°≠∞ High ^±Õ∞ Low ^±¶

∏–œ¬ ”˸–ª V th =0.5AP 1∏Œ §“ ÊÏ ¯¯À‚‚« ‚

¬¸–Ã

ëŒ «∞∏Œ« ‚¬¸–∫

° »Ÿ . ^©‚°≠ Vhigh ^{¬ «∞∏Œ°≠∞} High ^{±Û¬Œ ˆ§}

» ‚¬¸–ß . ^˚Û≠ CH1 ^«∞ High ±Û¬¶ ™∏ª¬ ÒÆ° ˆ

≈Œ°≠ P2 « 삪 fiˆ  Ì §Û˚∏Œ∞ High ^{±Œ ˆ≈»Ÿ} .

∞∫ Ê˝∏Œ , CH1 ^Ã∞ Low ^{±Û¬« ÒÆÃÁ} , CH2 ^{° §ˆ‚}

£ , ^Ô∞ Low ^{±Û¬¶ ؈“ ß} , BPF Î˙ ƒ« ¸–ª ∏œÈ

ß . ^{à ¸–∫ ‰} =0 ^{œ ß ÷ΰ «Á} , ^§‚¬ P1 ^˙ P2 ^{« ¯¯}

à ∞ª ÊÏ , ¯¯À‚‚« ‚¬¸–∫

(1)

(5)

(6)

(7) (8)

(10) (9) (2)

(4) (3)

1 LC

à «Ó «∞∏Œ« ‚¬¸–∫

à »Ÿ . ^˚Û≠ CH1 ^«∞ Low ±Û¬¶ ™∏ª¬ ÒÆ° ˆ≈Œ

°≠ P2 « 삪 fiˆ  Ì §Û˚∏Œ∞ Low ^{±Œ ˆ≈»Ÿ} . ^ÃÕ

∞à CH1 ^{« •ÃÕ ÒÆ°∞} High ^±Õ∞ low ^{±Û¬°≠ Œ} CH2 ^«

삪 fiˆ  Ì §Û˚∏Œ π∂ ª À ˆ ÷Ÿ . ^{à ∏Œ° Η}

ˆ≈ ƒ¸« ¸¯·˙¬ ¶ 4 ^{˝°≠ “≥—Ÿ} .

3. PLC ∏Œ ¶¤ ◊ ¯§

ø‚ƒ VLC √∫¤ª ∏∫œ¬ •°  ‰— ø‚fi∫¶ 220 V

¸¬±ª Îœ© ¸¤œ‚ ßœ© ¸¬± ·’∏Œ (Power Line Coupler; PLC) ^{¶ ¶¤œ¥Ÿ} . ^∏∫» PLC ^∏Œ¬ Fig. 4 ^{Õ ∞Ÿ} .

Fig. 4(a) ^{¬ ¸¬±ª Îœ©} ASK fi∫¶ ¤≈œ‚ ß— ∏Œμ ß . ^{≈£fl˝‚°≠} 100 kHz ^{ÁŒƒ¶ fl˝œ©} Analog switch

° Œ°œÌ , ∂錡Œº≠°≠ ˝∫— fi∫¯ 100 us ^÷‚ 40 ms « ∏¸ƒ fi∫¶ ÁÎœ© Analog switch ^¶ ON/OFF ^‘∏Œ

· 100 kHz ^ÁŒƒ¶ ASK ^Ø∂œ¥Ÿ . ASK ^{Ø∂» fi∫≈£¶}

FET ^« Gate ^{° °œÌ} Drain ^{° ¨·» Æ£∫} (L) ^{◊ ≥¤√Õ} (C2)

¶ Îœ© 220V ^¸¬±° ASK Ø∂≈£¶ ¸¤œ¥Ÿ . ^{«Ë° Á}

Η ∂錡Œº≠¬ Atmel ^Á« Atmega8 ^ÃÁ , ASK ^Ø∂°

ÁΗ Analog switch ^¬ Analog devices ^Á« ADG417 ^ÃÌ , FET ^¬ International Rectifier ^Á« IRF 540 ^{ª ÁÎœ¥Ÿ} . ^¸¬

± ¯° ≈£¶ ·’œ‚ ßœ© ÁΗ Æ£∫ (L) ^¬ FET  ^{° ¨}

·» 1 ˜ «± ¯ Œˆœ∫° ‡ 317 uH ^ÃÁ , ^{¸¬±  ° ¨·»}

2 ˜ «± ¯« Œˆœ∫° ‡ 10 uH ^Œ Toko ^Á« T1002N ^{ª ÁÎ}

œ¥Ÿ . ¸¬±° ¨·» ≥¤√Õ C2 ^¬ 0.22 uF ^{ª ÁÎœ¥Ÿ} . Fig. 4(b) ¬ ¸¬±ª Îœ© ¸¤» ASK fi∫¶ ˆ≈œ‚ ß—

PLC ^∏ŒÃŸ . ©‚°≠ ÁΗ Æ£∫ (L) ^{Õ ≥¤√Õ} (C2) ^¬ PLC

¤≈∏ŒÕ øœœ‘ T1002N ^˙ 0.22 uF ^{ª ÁÎœ¥Ÿ} . PLC ^¤

≈ŒÕ ˆ≈Œ°¬ ¢¢ ¸¬±∏ŒŒÕ Ø‚«¬ ̸–« Ê›ª ʈœ‚ ßœ© ◊π¸–à 5.1 V Œ ¶ ŸÃ¿Â¶ ÁÎœ¥Ÿ .

¸¬±ª Îœ© ˆ≈» ASK Ø∂ fi∫¶ ı¯‚Õ Envelope detector, Threshold circuit ª Î˙œÈ≠ ¤≈Œ°≠ ¸¤— fi

∫¯ 100us « ∏¸ƒ fi∫¶ π∂œ¥Ÿ .

’˙ PLC ∏Œ« ¸¤Ø∫ª ÀΔ∏‚ ßœ© Fig. 4(a) ^« Test point 1 ^˙ Fig. 4(b) ^« Test point 2 Áë ¸–¸fiˈ¶ ¯§

— ·˙¬ Fig. 5 ^{Õ ∞Ÿ} .

Fig. 5 ^{°≠Õ ∞Ã} PLC ∏Œ°≠ ¸–¸fiˈ¬ ‡ 100 kHz ^°

≠ ÷ΰ «˙∏Á , à ÷ƒˆ¶ ÁÎœ© ¤≈Œ°≠¬ ∏¸fi∫

¶ ASK ^{Ø∂— Õß} . Fig. 6 ^∫ PLC ∏Œ°≠ ¸¤«¬ ≈£¶

¿«Œ∫⁄¡¶ ÁÎœ© ¸¯— ƒ¸ª ™∏ΩŸ .

(a) PLC transmitter circuit

(b) PLC receiver circuit

Fig. 4. PLC circuit.

Fig. 5. PLC Transmission characteristics.

Fig. 6. 100 kHz ASK pulse through power line.

(a) Tx ASK pulse : 100 kHz (1 V/div) (b) Rx ASK pulse : 100 kHz (1 V/div) (c) The output of the envelope detector (5 V/div) (d) The output of the threshold circuit (5 Vdiv).

(11)

Fig. 6(a) ^{¬ ’«} Fig. 4(a) ^{°≠ ∏Œ} PLC ^¤≈Œ« Test point 1 °≠ ¸¯— ƒ¸∏Œ≠ 100 kHz ^{« ÁŒƒ° fi∫¯} 100 us sec

∏¸fi∫Œ ASK Ø∂» Û¬¶ ™∏ΩŸ . Fig. 6(b) ^¬ PLC ^ˆ≈Œ

°≠ À‚» ASK ^{Ø∂≈£ÃÁ} Fig. 4(b) ^« Test point 2 ^{°≠ ¸}

¯— ƒ¸ÃŸ . Fig. 6(c) ^¬ ASK ^Ø∂≈£° Envelope detector ^¶

Î˙— ƒ° ™∏™¬ ƒ¸∏Œ≠ Fig. 4(b) ^« Test point 3 ^{°≠ ¸}

¯— ƒ¸ÃŸ . Fig. 6(d) ¬ «∞∏Œ¶ Î˙— ƒ« ¸–∏Œ≠ , Fig. 4(b) ^« Test point 4 °≠ ¸¯— ÷æ π∏ ƒ¸ÃŸ . VLC ^√

∫¤« ¢ ¤≈ŒÕ ˆ≈Œ°≠¬ à fi∫¶ ‚ÿœ© ¸¤√£ª –“œ© ≈£§ª ¸¤‘∏Œ· §Œ£° •≈ª ʈœ¥Ÿ .

4. VLC ∏Œ ¶¤ ◊ ¯§

VLC ^∏Œ¬ LED ¶ Ø∂œ© ⁄د£° ˚ª Ê‚œ¬ ¤≈Œ Õ ˆ≈» ˚ª fiΔ ¯≈£¶ π∏œ¬ ˆ≈ŒŒ ÃÁÓ¯Ÿ . VLC ¤≈ŒÕ ˆ≈Œ ∏Œ¬ Fig. 7 ^{˙ ∞Ÿ} .

Fig. 7(a) ^¬ LED ^¶ FSK Ø∂œ‚ ß— ¤≈Œ ∏ŒÃÁ , ^’«

Fig. 1 ^{° ∏Œ} Tx1 ^˙ Tx2 °≠ øœœ‘ ÁÎœ¥Ÿ . Tx1 ^˙ Tx2 ^¬

ø‚≈£° μfiœÈ ¢ Time slot °≠ ¸¤“ •ÃÕ¶ fl˝√∞

μœ Interrupt routine ^{ª ∏∫œ¥∏Á} , ^{à •ÃÕ°} Analog ^∫

ß°« Control ^{‹⁄° °ÿ¯Ÿ} . ^{•ÃÕ« ÒÆ°∞} High ^{±œ ߬}

50 kHz ^{« ÁŒƒ°} FET ^« Gate ^{° °ÿˆÁ} , ^∞ Low ^{±Û¬œ ߬}

200 kHz ^° FET ^« Gate ^{° Œ°«Ó} FET ^« Drain ^{° ¨·»} LED

°≠ FSK Ø∂» ≈£§ª fl˝œ¥Ÿ . «Ë°≠ ÁΗ ∂éŒ

¡Œº≠¬ Atmel ^Á« Atmega8, Analog switch ^¬ Analog

devices ^Á« ADG417, FET ^¬ International Rectifier ^Á« IRF 540 ^ÃÁ , LED ^¬ HELIO Optoelectronics Corp. ^{« Ȉ§} LED

Œ HMHP-E1LW ^{ª ÁÎœ¥Ÿ} .

Fig. 7(b) ^¬ PLC ŒŒÕ ¯fi» ø‚fi∫° ˚Û FSK ^{Ø∂» ≈}

£§ª π∂œ‚ ß— VLC ^{ˆ≈Œ¶ ™∏ΩŸ} . Rx1 ^˙ Rx2 ^{« œÂ}

˛Ó ∏Œ¬ øœœÁ ¢¢« Time slot °≠ •ÃÕ¶ ˆ≈œμœ

Interrupt routine ^{ª ∏∫œ©} Analog switch ^{¶ ¶Óœ¥Ÿ} . Rx1

ª ‚ÿœ© ø¤˙§ª ≥ÌœÈ ŸΩ˙ ∞Ÿ .

LED1 ^˙ LED2 ° Ÿ¢œ© ≥°«Ó ÷ª ß Œ ≈£§ P1 ^˙ P2

° ⁄د£°≠ •’«Ó §À‚‚ PD1 ° •È° ‘Áœ«Œ , ^’

« ƒ (1) ^{˙ ∞Ã} P1 ^˙ P2 ^{° Ò — ¸–Ã} PD1 ^{°≠ fl˝—Ÿ} . ^{à ¸}

–à BPF ^{¶ Î˙œÈ≠} Tx1 ^{« ÒÆ°∞} High ^±Û¬Œ 50 kHz ^≈

£° ÷ª ß∏  Õ¶ Î˙œÌ∞ Low ±Û¬ «¬ §ˆ√£° ÿÁ œ¬ 200 kHz ≈£° ÷ª ß°¬  Õ°≠ ˜‹»Ÿ .

BPF ^Õ Analog switch ^{¶ Î˙—} 50 kHz ^≈£¬ Envelope detector ^Õ Threshold circuit ¶ ≈°È≠ ¯ ≈£¶ π∏—Ÿ .

ˆ≈Œ° ÁΗ §À‚‚¬ Hamamatsu ^Á« C-5460 APD ^Ã

Á , ^{∂é¡Œº≠Õ} Analog switch ¬ Œ ¤≈Œ°≠ ÁΗ

Õ˙ ∞Ÿ .

VLC ¤ˆ≈ ∏Œ° §Û˚∏Œ ø¤œ¬ ˆ ÆŒÿ∏‚ ßœ©

¤≈Œ°≠ Ø∂«¬ ˙§˙ ˆ≈Œ°≠ π∂«¬ ƒ¸ª ¸¯œ¥

Ÿ . Fig. 8 ^∫ Time slot 1 ^°≠ Tx1 ^{à Æ⁄} 9600 bps ^{”μŒ Æ⁄}

∞ F" ^{¶ ¸¤œÌ} , Tx2 ^¬∞ Low ±Û¬¶ ؈œÌ ÷ª ß VLC ^¤≈

Œ°≠ ¿«Œ∫⁄¡¶ ÁÎœ© ¸¯— ƒ¸ª ™∏ΩŸ .

Fig. 8(a) ^¬ PLC ŒŒÕ« ø‚fi∫Œ≠ 100 us ^{fi∫¯ª °ˆ}

Ì ÷Ÿ . Fig. 8(b) ^¬ PLC ^{« ø‚fi∫°} Tx1 ^{∂錡Œº≠«}

interrupt ^{‹⁄° Œ°… ß} Falling edge ^{°≠ Æ⁄} "F" ^{° ÿÁœ}

¬ ASCII ⁄° ¸¤«¬ Û¬¶ ™∏ªÁ , ^’« Fig. 7(a) ^« Test point 1 °≠ ¸¯— ƒ¸ÃŸ . Fig. 8(c) ^¬ Tx1 ^{« •ÃÕ°} FSK ^Ø

(a) VLC transmitter circuit

(b) VLC receiver circuit

Fig. 7. VLC circuit.

Fig. 8. The signal waveforms in VLC transmitters.

(a) The synchronizing pulse from the power line (5 V/div) (b) The transmission data of Tx1: character “F" (5 V/div) (c) The FSK signal to LED1 (1 V/div)

(d) The FSK signal to LED2 (1 V/div) .

∂«Ó FET ^« Gate ° Œ°«¬ ¸–ª ™∏ªÁ , ^’« Fig. 7(a)

« Test point 2 °≠ ¸¯— ƒ¸ÃŸ . Fig. 8(d) ^¬ Tx1 ^{à •ÃÕ¶}

¸¤œ¬ ø» Tx2 ^°∞ Low ^{±Û¬° ÿÁœ¬} 200 kHz ^{« ÁŒƒ}

¶ FET ^« gate ° Œ°œ¬ Û¬Œ≠ Tx2 ^« Test point 2 ^{°≠ ¸}

¯— ƒ¸ÃŸ .

Fig. 9 ^¬ Rx1 ^{« ˆ≈Œ°≠} Tx1 « •ÃÕ° π∏«¬ ˙§ª ¿

«Œ∫⁄¡¶ ÁÎœ© ¸¯— ƒ¸ÃŸ .

Fig. 9(a) ^¬ PLC ŒŒÕ« ¯fi«¬ ø‚fi∫¶ ™∏ªÁ , PLC

« ø‚fi∫° Rx1 ^{∂錡Œº≠«} interrupt ^{‹⁄° Œ°…}

ß Falling edge °≠ π∏˙§Ã √¤»Ÿ . Fig. 9(b) ^¬ LED1 ^˙ LED2 ŒŒÕ« ≈£§Ã ¯£°≠ •’«Ó ˆ≈… ß PD1 ^{« À‚}

¸–ª ™∏ªÁ , ^’« Fig. 7(b) ^« Test point 1 ^{°≠ ¸¯— ƒ¸}

ß . ^{à ۬¬} Tx1 ^°≠ FSK ^{Ø∂» ≈£§˙} Tx2 ^°≠ Low ^{¶ ™}

∏ª¬ 200 kHz « ≈£§Ã •’«Ó À‚» Û¬Œ≠ , Tx1 ^{« •}

ÃÕ ÒÆ°∞ High ^{±Û¬° ÷ª ß} LED1 ^« 50 kHz ^Õ LED2 ^« 200 kHz ° •’«Ó ÷Ó  Õ¶ ÁÎœˆ  ∏È •≈∏Œ Œ—

°Ø° fl˝—Ÿ .

Fig. 9(c) ¬ ÃØ— •≈ª ʈœ‚ ßœ© BPF ^{¶ Î˙— ƒ«}

ƒ¸ª ™∏ªÁ , ^’« Fig. 7(b) ^« Test point 2 ^{°≠ ¸¯— ¸–}

ƒ¸ÃŸ . ^{à ۬°≠¬} Tx1 ^«∞ High ^{±Û¬¶ ™∏ª¬} 50 kHz

≈£° §Û˚∏Œ ˆ≈«Á , Tx1 ^˙ Tx2 ^«∞ Low ^{±Û¬¶ ™∏ª}

¬ 200 kHz ^{≈£¬ ¯≈£« ‡} 1/5 Ë ÃœŒ ˆ˙˜ “» Û¬

”ª º ˆ ÷Ÿ . Fig. 9(d) ^¬ Envelope detector ^Õ Threshold circuit ª ≈£ ƒ π∏» •ÃÕŒ≠ ’« Fig. 7(b) ^« Test point 3 °≠ ¸¯— ƒ¸ÃŸ . ^{à ƒ¸∫} Tx1 °≠ ¸¤— •ÃÕŒ Fig.

8(b) ^{Õ øœ— ƒ¸ÃÁ} , ^Æ⁄ "F" ^« ASCII ^{Œ£¶ ™∏ΩŸ} . ^{à ƒ}

¸°≠∞ Low ^±¸–∫ "1", ^∞ High ^±¸–∫ "0" ^{« Û¬° ÿÁœÁ} , UART ‹⁄¶ Îœ© ¸¤“ ß LSB ^ŒŒÕ MSB ^{¯≠Œ ¸¤««}

Œ , Fig. 10 °≠ ∏¬ ŸÕ ∞à Start bit(0) ^{Õ Æ⁄} "F" ^{° ÿÁœ¬}

ASCII ^⁄ "01000110" « ™¯∏Œ ÒÆ° Ë≠«Ó ÷Ÿ .

à √∫¤ª ÁÎœ© ¢ §Œ°≠ ©Ø ≥« Æ⁄¶ ¨”˚∏Œ

¸¤œ¬ ÊÏ°μ §Œ£ •≈à fl˝œˆ  Ì §Û˚∏Œ ˆ≈

«¬ ˆ ÆŒÿ ∏‚ ßœ© TX1 ^˙ Tx2 °≠ ¢¢« Æ⁄≠ª ¸¤

œÈ≠ ˆ≈ƒ¸ª ¸¯œ¥Ÿ . Tx1 ^{« •ÃÕÕ} Tx2 ^{« •ÃÕ°}

≠Œ •≈à ¯Ã §Û˚∏Œ ˆ≈ ª ¿«Œ∫⁄¡Õ œÕŒ ø√° ¸¯œ‚ ßœ© — ≥« ˆ≈∏Œ¶ ÁÎœ© 2 ^{≥« √–}

“ » ˆ≈≈£¶ ø√° ¸¯œ¥Ÿ . Fig. 11 ^∫ Tx1 ^°≠ "VLC- CH#1", TX2 ^°≠ "VLC-CH#2" « Æ⁄≠ª ¸¤“ ß ¿«Œ∫⁄

¡° ™∏≠ ˆ≈ƒ¸ÃŸ .

Fig. 11(a) ^{¬ fi∫¯Ã} 100 us ^{ÃÌ ÷‚°} 40 ms ^Œ PLC ^ø‚fi

∫¶ ™∏ΩŸ . Fig. 11(b) ^¬ PD ^{« À‚¸–∏Œ≠} LED1 ^˙ LED2

« ≈£§Ã •’» Û¬¶ ™∏ΩŸ . Fig. 11(c) ^¬ PD ^{« À‚¸–}

à BPF ¶ Î˙— ƒ« Û¬¶ ™∏ΩŸ . Fig. 11(d) ^¬ Envelope detector ^Õ Threshold circuit ª ≈£ ƒ π∏» •ÃÕŒ≠ ø‚

≈£« ß°°≠ ŸŒ √¤«¬ ÒÆ≠∫ Tx1 ^{≈£ÃÌ Œ ø‚≈}

£ Áë fl£°≠ √¤«¬ ÒÆ≠∫ Tx2 ^{« ≈£° ÿÁ—Ÿ} . Fig. 11(d) « ≈£¶ ƒªÕ« ˜ƒ‹⁄° ¨·œ¥ª ß œÕ°

™∏≠ ≠È∫ Fig. 12 ^{Õ ∞Ÿ} . ^{©‚°≠ ∏È} TX1 ^{°≠ ¤≈— Æ⁄}

≠ "VLC-CH#1" ^˙ TX2 ^{°≠ ¤≈—} "VLC-CH#2" ^{° ≠Œ •≈ª}

œ∏∞ˆ  Ì §Û˚∏Œ fl ˆ≈«Ì ÷Ωª º ˆ ÷Ÿ .

Fig. 9. The signal waveforms in a VLC receiver.

(a) The synchronizing pulse from the power line (5 V/div) (b) The received FSK waveform at PD (0.2 V/div) (c) The output signal of the filter (0.2 V/div) (d) The recovered signal (5 V/div).

Fig. 11. The signal waveforms in a VLC receiver.

(a) The synchronizing pulse from the power line (5 V/div) (b) The received FSK waveform at PD ( 2 V/div) (c) The output signal of the filter (2 V/div) (d) The recovered signals (5 V/div).

Fig. 10. The waveform of character "F".

Fig. 13 ¬ ª «Ë°≠ ¶¤œ© ÁΗ VLC ^∏ŒÕ PLC ^∏Œ«

‹¸ª ™∏ΩŸ . ^{— ≥«} PCB ^° Tx ^Õ Rx ∏Œ¶ Œ ∏∫œÌ ø œ— PCB ^∏Œ 4 ≥¶ ÁÎœ© ¤≈ ¯°≠¬ Tx ^{∏Œ∏ ÁÎœÌ}

ˆ≈ ¯°≠¬ Rx ∏Œ∏ ÁÎœ© «Ëœ¥Ÿ .

5. ·–

ª ÌÆ°≠¬ ¸¬±ª Η ø‚≈£« ¸¤Êƒª ÃÎœ©

«ª°≠ °√§Î≈√∫¤ £« •≈ª ʈœ¬ √∫¤« ∏∂¶

ıŒÃ ¶»œÌ «Ëœ¥Ÿ . ’˙ ¸¬±« ø‚≈£¶ ÃÎœ©

•≈ª “≈œ¬ ¯Æ° Îœ© ÀΔ∏“Ì , ^{¸¬±ª Îœ©} ASK

Ø∂fi∫¶ ¸¤œ‚ ß— PLC ∏Œ« ¶¤œÌ «Ë·˙¶ ¸¯

œ¥∏Á , LED ^« FSK Ø∂Õ √–“ ¸¤ª ß— VLC ^{∏Œ¶ ¶}

¤œÌ «Ë·˙¶ ¸¯œ¥Ÿ .

ÎŒ– «ª°≠¬ ¸¬±Ã –∫ μ™° …ƒ ¯Î∏Œ ¨·«

Ó ÷∏«Œ ÃÕ ∞à ¸¬±ª Îœ© ø‚≈£¶ ¸¤œÈ °Ó Ó ¢”‹⁄ŒŒÕ ø‚≈£¶ ±‘ Úª ˆ ÷‚ ßÆ° •≈ª Ê ˆœ‚ ß— √–“ VLC √∫¤« ∏‡Ã ≈Ï £Ìÿ¯Ÿ . ^«ª°

≠ LED « ∂̪ ÃÎœ© æ≠◊ƈ©Î °√§Î≈√∫¤ª

∏‡“ ß Ã Êƒª ÁÎœÈ •≈ª œ∏∞ˆ  Ì √∫¤ª Æ œ¬ •° π∫ μÚà »Ÿ .

Á« ¤

à ¨∏¬ ≠Ô˙–‚˙Ζ≥ ≥ª –˙¨∏Ò ˆ¯∏Œ ˆ‡

«˙¿œŸ .

REFERENCES

[1] A. M. Street, P. N. Stavrinou, D. C. O'Brien, and D.

J. Edwards, “Indoor optical wireless systems-a review”, Opt. Quantum Electron., Vol. 29, pp. 349- 378, 1997.

[2] J. M. Kahn and J. R. Barry, “Wireless infrared communications”, Proc. IEEE, Vol. 85, No. 2, pp.

265-298, 1997.

[3] S.-H. Lee, “Reducing the effects of ambient noise light in an indoor optical wireless system using polarizers,” Microwave and Optical Technology Letters, Vol. 40, No. 3, pp. 228-231, 2004

[4] T. Komine and M. Nakagawa, “Fundamental analysis for visible-light communication system using LED lights”, IEEE Transactions on Consumer Electronics, Vol. 50, No. 1, pp. 100-107, 2004.

[5] S.-H. Lee, “Visible light identification system using optoelectronic feedback of a lighting LED”, J. Sensor Sci. & Tech., Vol. 20, No. 3, pp. 193-198, 2011.

[6] S.-H. Lee, “Reducing the effects of noise light in a visible light communication system using two color LEDs”, J. Sensor Sci. & Tech., Vol. 21, No. 6, pp.

429-433, 2012.

[7] P. A. Janse van Rensburg and H. C. Ferreira,

“Coupler winding ratio selection for effective narrowband power-line communications”, IEEE Trans. Power Del., Vol. 20, No. 1, pp.140-149, 2008.

Fig. 12. Characters displayed on a monitor.

Fig. 13. The VLC and PLC circuits used in experiments.