Ch. 15 Operational Amplifier (OP amp)

Ch. 15 Operational Amplifier (OP amp)

• Discrete component (이산소자) ~ individual BJT’s, FET’s

• Integrated Circuit (집적 회로) ~ A single package that contains many number of active and passive components, all constructed on a single piece of semiconductor material

• OP amp ~ a high-gain dc amplifier with a high input impedance and low output impedance.

OP amp - Overview

OP-amp supply voltage (a) two DC voltages with the opposite sign (b) only one supply voltage while the other grounded

Input signal : inverting(반전) & non-inverting(비반전)

IC Identification

Prefix(접두) : to identify the manufacturer

(Ex.) MC = On semiconductor, TI = Texas Instruments

Designator(지시) code : information of the product number and its operating temperature (Ex.) C = 0 ~ 70 ^oC , I = -25 ~ 85 ^oC, M = -55 ~ 125 ^oC

(Ex.) Commercial, Industrial, Military

Suffix(접미) : the OP-amp package code (Ex.) N, P, VP = plastic, J = ceramic,

DIP = dual-in-line, SMP = surface-mounted package

 Differential(차동) amplifier : amplification of the difference voltage between two input signals

 Output voltage is affected by

• Op-amp gain

• Input/output polarity

• Supply voltage

• load resistance

Operation Overview

2

2

1

1

~ differential voltage to be amplified ~ Noninverting input voltage

~ Inverting input voltage

d f

f di

i f

V f V

V V

V V

 

OP-amp Gain

• Open-loop(개 루프) voltage gain (A_OL) ~

Maximum voltage gain in the absence of a feedback resistance.

Typically 10,000 or greater up to 200,000

• Effective voltage gain ~ reduced voltage gain with a feedback path (귀환경로) added

Input/Output Polarity

2

2

1

1

~ differential voltage to be amplified ~ Noninverting input voltage

~ Inverting input voltage

d

f f

di i

f

V f V

V V

V V

 

diff 0

V  V_diff  0

Input/Output Polarity Relationship

Out-of-phase ~ inverting input in-phase ~ non-inverting input

Supply Voltage (공급 전압)

• The supply voltages (+V & -V) limit the output voltage swing.

• Whatever the gain or input signal strength, the output voltage cannot exceed +V or –V.

• –V < V_out < +V

5V V_out 5V

    0V V_out  5V

Supply Voltage and Load Resistance

(Ex.) 741 op-amp

• The practical output voltage is always smaller than the supply voltage, which depends on the load resistance value.

R_L Max. (+) V_out Min. (-) V_out

10 kW < R_L (+V) – 1 V (-V) + 1 V 2 kW < R_L < 10 kW (+V) – 2 V (-V) + 2 V

R_L

10 kW < R_L +1V ~ +9 V 2 kW < R_L < 10 kW +2V ~ +8 V

Example 15.2

Q. Determine the peak-to-peak and the maximum output voltages available for the circuit below.

( ) ( )

(150)(100 ) 15 7.5 ( ) 1 9 (max)

( ) 1 9 (max)

out v in pp pp pk

pk pk

V A V mV V V

V V V V

V V V V





    

    

    

Example 15.3

Q. Determine the maximum input voltage available for the circuit below.

( ) ( )

,

pp

Since 2 k < < 10 k ,

( ) 2 4 (max)

( ) 2 4 (min)

Thus 8

8 400 mV

200

L pk

pk

output pp

output pp pp

in

v

R

V V V V

V V V V

V V

V V

V A





W W

    

    



   

Basic Differential Amplifier (1)

• Two input signals producing one output signal proportional to the difference between two inputs

• Assume ideal case of identical Q₁ and Q₂

• Trivial solution due to V_diff = 0

1 2

1 2 1 2

1 1 1

2

2

2

2 2

1

1

, 0.7 0.7

2

Since an

( )

d

2

0 V

EE

E E E B

C E C

E EE

EE

E

C CC C

C E E EE

EE

C C

out C C

C

C CC C C

I I I V V V V

I I I

V V

I R

V V I R

V V

I I I I

I I I

V V V

I R

     

    

 



  

 









Basic Differential Amplifier (2)

• Consider an oscillating signal to the inverting input

• I_E1 increases during the first half cycle, while V_E = -0.7 V

~ I_E2 decreases at the same time ~ I_EE = constant

• or V_E – (– V_EE) = const

• Voltage drop at R_C1 increases and V_C1 decreases

• Voltage drop at R_C2 decreases and V_C2 increases

• The output voltage of V_out = V_C1 – V_C2 decreases

• I_E1 decreases during the second half cycle and so on

• Therefore, the input and output signals are out-of-phase with each other ~ “Inverting”

Basic Differential Amplifier (3)

• Consider an oscillating signal to the noninverting input

• We know that I_EE = constant

• I_E2 increases during the first half cycle ~ I_E1 decreases at the same time

• Voltage drop at R_C2 increases and V_C2 decreases

• Voltage drop at R_C1 decreases and V_C1 increases

• The output voltage of V_out = V_C1 - V_C2 increases

• I_E2 decreases during the second half cycle and so on

• Therefore, the input and output signals are in-phase with each other ~ “Non-inverting”

Mode of Operation of OP Amp

 Single-ended Mode

• Input signal is applied to the only one input of the OP amp, while the other input is grounded

• Inverting or noninverting amplifier

 Differential Mode

• Two signals are applied to the OP amp and its differential is amplified

 Common Mode

• Two signals with the same amplitude, frequency and phase are applied to the OP amp

• The output signal should be zero in an ideal situation

• Noise or unintended distortion of the signal can be eliminated